CPU–SoC Mask Layout Designer (Diploma Level, Contract)
Work in the Silicon Engineering Group on mask layout and verification for SoC/CPU blocks. Execute layout creation, floorplanning, power grid and bump design, and run verification and reliability checks to meet project specifications.
This is a hands-on entry-level contract position based in Penang with a hybrid work model.
Entry-level — diploma fresh graduate; 0–1 years of experience expected.
Primary tasks include layout creation, verification, troubleshooting, and collaboration to deliver verified layout blocks.
Must-have qualifications and desirable skills.
Diploma in Electrical and Electronic Engineering or a related field. Positions are open to diploma-level fresh graduates only.
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
