CPU Server Physical Design Methodology, Infrastructure and Automation Engineer
QualcommJob Title
CPU Server Physical Design Methodology, Infrastructure and Automation Engineer
Role Summary
Engineer responsible for methodology, infrastructure, and automation for CPU server physical design in a CPU engineering organization. Work spans architecture, pre-silicon design, verification, and post-silicon validation to deliver high-performance, low-power CPU designs.
Experience Level
Senior-level role. Preferred candidates have extensive experience in high-performance microprocessor design and physical design methodology and automation.
Responsibilities
Primary responsibilities include driving methodology and infrastructure for CPU physical design and collaborating across teams to meet performance, power, and functionality targets.
- Develop and verify high-performance, low-power CPU physical designs using advanced knowledge of architecture, micro-architecture, logic, circuits, and physical design.
- Design, implement, and improve physical design methodology, flows, and automation tools for synthesis, place-and-route, and timing closure.
- Debug complex issues using simulators, waveform tools, emulation, and silicon validation results.
- Create functional models, checkers, test plans, and automated test generation to validate designs.
- Collaborate with architects, verification, CAD, and validation teams to define requirements and trade-offs (performance, power, cost, features).
- Write and review detailed technical documentation and mentor junior engineers.
- Engage with senior leadership as required and influence cross-functional decisions affecting multiple teams.
Requirements
Must-have technical skills and experience; separate education details are under Education Requirements.
- 6+ years of relevant engineering experience (more experience preferred); demonstrated work on high-performance microprocessor design and physical design methodology.
- Proficiency in high-level programming (C, C++) and scripting (Python, Perl, etc.) for automation and tooling.
- Experience with hardware description languages, simulators, and waveform debugging (Verilog, VHDL or equivalent).
- Familiarity with industry-standard synthesis, place-and-route, and design verification tools and flows.
- Experience with simulation, emulation, formal verification, and silicon validation techniques.
- Experience creating verification artifacts: models, checkers, test plans, and test generation frameworks.
- Proven ability to work independently, prioritize ambiguous tasks, and provide guidance to other engineers in a matrixed organization.
- Strong verbal and written communication skills; ability to present complex technical information to leadership.
Education Requirements
Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field were listed as minimum qualifications with experience adjustments (e.g., Bachelor +6 years, Master +5 years, PhD +4 years). Preferred: Master’s in a related field. Equivalent practical experience considered.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
