Skip to main content
Qualcomm logo

CPU Server FV/CLP/STA Engineer

Qualcomm
September 10, 2026
Full-time
On-site
Santa Clara, California, United States
$147,900 - $221,900 USD yearly
Physical Design Jobs, Level - Entry or Early Career

Job Title

CPU Server FV/CLP/STA Engineer

Role Summary

Work on CPU server physical-design verification and signoff tasks within the CPU Engineering team. The role focuses on synthesis, timing closure (STA), clock and power checks (CLP), and formal verification for multi-million-gate CPU designs.

Experience Level

Entry-level / Early career. Typical guidance: ~2+ years of relevant industry experience (see Education Requirements for degree and exact experience combinations).

Responsibilities

Key day-to-day responsibilities include:

  • Perform synthesis for large, data-path-oriented multi-million-gate designs using tools such as DC, Genus, and Fusion Compiler.
  • Develop and apply constraints for multi-clock-domain hierarchical and flat timing analysis.
  • Perform pre-layout STA, analyze timing reports, and generate timing ECOs.
  • Execute multi-power-domain synthesis flows and structural power checks using CLP.
  • Use formal verification methods and debug failures/aborts to resolution.
  • Analyze trade-offs among timing, area, power, and congestion; propose and implement fixes.
  • Automate and script flows (TCL) for synthesis and STA tasks.
  • Collaborate proactively with cross-functional stakeholders and support design bring-up.
  • Independently debug and solve complex verification and timing issues.

Requirements

Must-have technical skills and experience:

  • Practical experience with physical synthesis tools (Design Compiler, Genus, Fusion Compiler).
  • Strong experience in static timing analysis for multi-clock domains and generating timing ECOs.
  • Experience with multi-power-domain synthesis and structural power checks (CLP).
  • Hands-on formal verification experience and strong debugging skills.
  • Ability to analyze timing/area/power/congestion trade-offs and implement fixes.
  • Ability to write TCL scripts to automate synthesis/STA flows.
  • Good teamwork and stakeholder communication skills; able to work independently on complex issues.
  • Nice-to-have: experience with hierarchical STA and Hyperscale flows.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 2+ years of relevant work experience; OR Master's degree in those fields with 1+ year of relevant experience; OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

Qualcomm logo

Date Posted: 2026-09-10