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CPU Power and Thermal Management Architect

Qualcomm
August 31, 2026
Full-time
On-site
Santa Clara, California, United States
$198,700 - $298,100 USD yearly
SoC Architecture Jobs, Level - Senior

Job Title

CPU Power and Thermal Management Architect

Role Summary

Design and define CPU power and thermal management architecture for high-performance SoCs, with emphasis on boot, idle/active power, clock management, and thermal/limit control. Work within the CPU Engineering team and collaborate with hardware, firmware, and software architects to translate system requirements into micro-architecture and product definitions.

Experience Level

Senior-level role. The posting expects very senior experience (example: MS + 15+ years in CPU/SoC architecture). Minimum qualification options also include Bachelor's + 6+ years, Master's + 5+ years, or PhD + 4+ years in a relevant field.

Responsibilities

Key responsibilities include defining micro-architecture and driving integration across teams.

  • Collaborate with chip architects to define architecture concepts and high-level system requirements.
  • Lead development of micro-architecture and design of high-performance CPU systems.
  • Produce clear high-level architecture and micro-architecture specifications translatable to RTL.
  • Prepare and present technical documentation to engineering stakeholders and management.
  • Coordinate with hardware, software, and firmware teams to deliver end-to-end CPU system solutions.
  • Perform performance exploration in collaboration with CPU modeling teams.
  • Integrate CPU system features into products with platform teams.

Requirements

Core technical must-haves and relevant experience; degree requirements are summarized in the Education Requirements section below.

  • Must-have: Extensive CPU and SoC architecture experience (posting highlights 15+ years for senior hires).
  • Deep knowledge of microprocessor and coherent CPU system architecture.
  • Expertise in boot architecture and the SW/FW/HW interactions that affect boot KPIs.
  • Idle power management: clock and power gating techniques, ACPI/PSCI idle states, and SW/FW integration.
  • Active power management: DVFS architecture, voltage margining, reliability concepts, and familiarity with analog/mixed-signal IPs that affect Vmin.
  • Limit and thermal management: design and implementation of over-current, power, and thermal control loops in SW and HW.
  • Experience designing system-level SW/FW control loops and integrating them with hardware.
  • Solid understanding of logic design principles including timing and power impacts.
  • Strong technical writing and verbal communication skills; able to prepare stakeholder-facing documentation.
  • Nice-to-have: Experience across datacenter/server, mobile, compute, or automotive SoCs; experience with CPU modeling and performance exploration; background in analog/mixed-signal design.

Education Requirements

Posted qualifications reference Bachelor's, Master's, and PhD degrees in Electrical Engineering, Computer Engineering, Computer Science, or related fields. The posting gives multiple combinations of degree and experience: Bachelor's + 6+ years, Master's + 5+ years, or PhD + 4+ years. A Master's degree is cited elsewhere alongside a 15+ year experience example for senior candidates. Equivalent professional experience consistent with those minimums is acceptable per the listed qualifications.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-08-31