CPU Physical Design Engineer

Job Title

CPU Physical Design Engineer

Role Summary

Implement physical design for CPU cores from RTL through GDS, focusing on synthesis, floorplanning, placement and routing, timing closure, power and noise analysis, verification and signoff. Collaborate closely with logic, circuit, architecture, clocking, full-chip design teams and EDA vendors to optimize power, frequency and area and to improve physical design methodologies and automation.

Experience Level

Entry-level; typically 1–2+ years of relevant experience (posting requires at least 1+ years synthesis experience; degree-dependent experience requirements apply).

Responsibilities

Primary tasks for this role include implementing, verifying and optimizing CPU physical designs and enhancing design flows.

• Perform physical design implementation of custom CPU designs from RTL to GDS.
• Execute synthesis, place and route, floorplanning and clock tree synthesis.
• Perform static timing analysis, timing closure and power/clock distribution analysis.
• Conduct verification and signoff: formal equivalence, layout verification, DRC/LVS, electrical rule checking, and power/noise/reliability checks.
• Analyze implementation results and recommend fixes or microarchitecture changes to meet performance, power and area targets.
• Work with EDA vendors to extend tool capabilities and automate physical design flows.

Requirements

Must-have technical skills and experience. Preferred items are listed where noted.

• Experience with synthesis of digital logic blocks or partitions (minimum 1+ years).
• Familiarity with IC design toolflows (examples: Synopsys, Cadence) including logic synthesis, place-and-route, static timing analysis and design closure.
• Experience with PV convergence activities such as static timing and power analysis.
• Chip physical design verification experience: formal equivalence checks, DRC/LVS and noise flows.
• TCL scripting experience.
• Ability to perform CPU-level timing analysis and generate/verify timing constraints (preferred).
• Experience balancing timing fixes with power delivery, clocking and partitioning (preferred).

Education Requirements

Bachelor's degree in Computer Engineering, Electrical Engineering or a related field with 2+ years of relevant experience, or a Master's degree in Computer Engineering, Electrical Engineering or a related field with 1+ years of relevant experience. A Master's degree is listed as preferred. The posting notes that qualifications may also be met through equivalent combinations of industry experience, internships, coursework or research.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.