CPU Design Verification Principal Engineer
QualcommJob Title
CPU Design Verification Principal Engineer
Role Summary
Lead verification engineer focused on CPU power-management features for high-performance, low-power CPUs. Work within the CPU verification team in Bangalore to develop and execute verification plans, validate power intent, and collaborate with design, software, system architects, emulation and SoC teams to deliver silicon-quality results.
Experience Level
Senior / Principal level. Experience guidance in the posting indicates senior-level experience (typical guidance: Bachelor's +8+ years, Master's +7+ years, PhD +6+ years). The posting also lists lower minima for other bands (Bachelor's +4+, Master's +3+, PhD +2+), but the role is intended for senior/principal engineers.
Responsibilities
Primary duties include planning and executing verification for CPU power-management features and validating system-level power use cases.
- Develop comprehensive verification plans for power management (boot, reset, clock gating, power gating, voltage/frequency management, limit management, throttling).
- Create stimulus, write checkers and assertions, and run simulation and formal verification where applicable.
- Verify power intent using UPF and related methodologies.
- Collaborate with CPU design, system architects, software, SoC and DFT teams to validate use cases and resolve issues.
- Enable and run verification on emulation and FPGA platforms; debug and triage failures in simulation, emulation and silicon.
Requirements
Key required skills and technologies, plus preferred skills.
- Must-have: Proven experience in power management verification for CPUs/SoCs (clock gating, power gating, DVFS/DCVS, throttling, reliability).
- Hands-on experience with Verilog/SystemVerilog and common verification methodologies (UVM, testbench development, checkers, assertions).
- Proficiency in C/C++ and assembly; experience implementing embedded firmware in C and assembly for verification or bring-up.
- Experience with UPF or similar power-intent flows and verification of power domains.
- Experience with simulation and emulation platforms and FPGA-based verification; strong debug and triage skills for simulation/emulation/silicon failures.
- Familiarity with scripting languages for automation and testbench infrastructure.
- Nice-to-have: Experience with formal methods and assertions, deep knowledge of CPU microarchitecture, DFT/structural debug (JTAG, IEEE1500, MBIST, scan/memory dump), and advanced verification techniques.
Education Requirements
Bachelor's, Master's or PhD in Computer Science, Computer Engineering, Electrical/Electronics Engineering or a related engineering field is listed. The posting gives experience-based guidance tied to degree: examples include Bachelor's with 8+ years (or 4+ years for lower bands), Master's with 7+ (or 3+), and PhD with 6+ (or 2+). BE/BTech in CS/EE is explicitly mentioned as acceptable. Degrees in related fields are allowed.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
