CPU Design Verification Engineer

Job Title

CPU Design Verification Engineer

Role Summary

Responsible for functional verification of Altera's RISC-V CPU family, working with CPU architects, RTL designers, and system teams to validate correctness and performance targets. The role focuses on developing verification environments, driving coverage closure, debugging pre-silicon issues, and improving verification infrastructure.

Experience Level

Senior — requires substantial experience; the posting specifies 8+ years in ASIC or FPGA design verification.

Responsibilities

Primary responsibilities include planning and executing verification activities, developing environments and automation, and collaborating with architecture and RTL teams.

• Develop and execute detailed verification plans against architectural and microarchitectural specifications.
• Create scalable, reusable UVM-based testbenches and verification components.
• Perform functional coverage analysis, identify gaps, and implement coverage-closure strategies.
• Run system-level simulations to validate CPU functionality and performance.
• Debug pre-silicon issues, perform root-cause analysis, and implement corrective actions.
• Develop automation tools and scripts to optimize verification workflows.
• Collaborate with CPU architects and RTL developers on complex features and design trade-offs.
• Maintain and enhance verification methodologies, infrastructure, and automation flows.
• Document verification strategies and lead technical reviews with cross-functional stakeholders.

Requirements

Must-have technical skills and experience required for the role.

• 8+ years of ASIC or FPGA design verification experience.
• Expertise in HDLs such as Verilog or VHDL and HVLs such as SystemVerilog.
• Proven experience building UVM-based testbenches and verification components.
• Experience with RISC-V ISA and verifying CPU features.
• Proficiency in coverage-driven verification (CDV) and assertion-based verification (ABV).
• Familiarity with AMBA protocols (AXI, ACE, CHI, APB).
• Experience with simulation and debug tools (for example Synopsys VCS, Cadence Xcelium, Mentor Questa).
• Strong scripting skills for automation and analysis (Python, Perl, Tcl); familiarity with C++ for tooling is useful.
• Strong analytical, problem-solving, debugging, and communication skills; able to work in cross-functional teams.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering or Computer Engineering.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.