CPU-Core RTL Director
QualcommJob Title
CPU-Core RTL Director
Role Summary
Lead and manage a team of CPU RTL engineers responsible for delivering high-performance, low-power CPU cores from microarchitecture through RTL implementation, physical convergence, silicon bring-up, and product delivery. The role combines hands-on technical direction with people and program leadership across cross-functional CPU development teams.
Experience Level
Senior-level role. The position expects extensive experience in CPU RTL and microarchitecture (typical profile: 12+ years in CPU RTL design and 3+ years leading engineering teams or large technical projects).
Responsibilities
Accountable for technical execution, delivery, and team leadership across CPU projects.
- Lead teams designing complex CPU subsystems: fetch, decode, branch prediction, scheduling, execution pipelines, memory hierarchy, caches, power management.
- Translate architecture requirements into scalable microarchitectural and RTL implementations; provide technical direction on RTL, timing closure, power, verification readiness, and silicon debug.
- Own RTL execution and delivery from concept through silicon, including milestone planning, design freezes, tapeout preparation, and post-silicon support.
- Drive performance, power, area, and frequency (PPA) goals; review performance analysis and silicon characterization to identify optimizations.
- Coordinate cross-functional teams (Architecture, Verification, Physical Design, Power, DFT, CAD, Emulation, Firmware, Program Management) and lead bug triage and risk mitigation.
- Recruit, mentor, and develop engineering talent; define team priorities and resource allocation.
Requirements
Key technical and leadership requirements. Education details are summarized separately below.
Must-have:
- 12+ years of experience in CPU RTL design, microarchitecture, or related semiconductor development.
- 3+ years of experience leading engineering teams or large technical projects.
- Deep understanding of modern high-performance CPU architecture and microarchitecture and proven experience delivering complex RTL into production silicon.
- Expert knowledge of SystemVerilog and modern RTL development methodologies.
- Strong experience with timing closure, physical-design interactions, power optimization, and silicon implementation.
- Proven ability to make technical tradeoffs across power, performance, area, frequency, schedule, and risk.
- Experience coordinating cross-functional execution across Architecture, DV, PD, DFT, CAD, and Product Engineering organizations.
- Strong communication and leadership skills with ability to influence across organizations.
Nice-to-have / Preferred:
- Experience with vector/SIMD, FP/INT pipelines, MMU/virtualization, cache coherency, prefetching, and memory hierarchy optimization.
- Experience driving methodology, automation, and AI-assisted design workflows to improve engineering productivity.
- Experience with silicon bring-up, performance characterization, and post-silicon debug.
Education Requirements
Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field were explicitly mentioned. The posting describes degree-and-experience combinations: Bachelor's with 8+ years (or Bachelor's specifically required with 12+ years for this role), Master's with 7+ years, or PhD with 6+ years in relevant engineering fields. Equivalent practical experience is permitted where the posting lists degree-or-experience alternatives.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
