Core Performance Architect

Job Title

Core Performance Architect

Role Summary

Lead research and development of high-performance CPU core architectures and micro-architectures for next-generation RISC-V processors. Manage a team of performance engineers to model, simulate and validate architecture ideas, and collaborate with product, architecture, and RTL design teams to meet aggressive performance targets.

Base pay range: $254,340–$310,860 USD (annual).

Experience Level

Senior — requires 10+ years of experience in high-performance processor development and 5+ years participating in engineering teams that deliver hardware or software products.

Responsibilities

Primary responsibilities include defining and executing research and validation activities to drive core performance improvements and delivering those improvements into RTL.

• Lead and mentor a team of performance engineers to research, model, and develop architecture and micro-architecture features.
• Collaborate with Product Management and Product Architecture to define architecture and product performance targets.
• Design and run experiments and performance studies to evaluate architecture ideas and trade-offs.
• Work with RTL design teams to ensure performance goals are implemented and validated in silicon or FPGA prototypes.
• Develop workload characterization and reduction techniques to enable efficient simulation and projection.

Requirements

Key qualifications and technical skills; must-haves are listed first, followed by desirable skills.

• Must-have: 10+ years of experience in high-performance processor development.
• Must-have: 5+ years contributing to engineering teams that deliver HW or SW products.
• Must-have: Hands-on expertise with hardware development flows (RTL/implementation, verification/validation, backend flows) and FPGA flows and debug (including ILA/waveform capture).
• Must-have: Strong ability to analyze performance bottlenecks across micro-architecture and software stacks.
• Must-have: Strong foundation in out-of-order CPU micro-architecture and knowledge of industry micro-architecture concepts.
• Must-have: Experience in workload characterization and reduction techniques for efficient performance simulation and projection.
• Nice-to-have: Awareness of potential security implications of micro-architecture choices.
• Nice-to-have: Familiarity with known industry micro-architectures and advanced performance modeling techniques.

Education Requirements

MS or PhD in Computer Science or Computer Architecture.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.