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Compiler Backend Engineer

Normal Computing
October 23, 2026
Full-time
On-site
Mountain View, California, United States
$200,000 - $300,000 USD yearly
EDA Jobs, Level - Mid-Career

Job Title

Compiler Backend Engineer

Role Summary

Design and implement the compiler backend that maps large-language-model (LLM) inference onto Normal's custom in-memory accelerator. Work at the interface between compiler and hardware to create scheduling, memory planning, fusion, and code-generation that produce correct, efficient execution on simulators, FPGA prototypes, and silicon.

Experience Level

Mid-level (Level - Mid-Career). The posting does not state explicit years of experience; typical expectation is roughly 3–7 years of relevant compiler or systems work.

Responsibilities

Primary ownership areas for the compiler backend team.

  • Code generation: implement passes that emit the code the hardware executes and design new approaches where conventional techniques do not apply.
  • Scheduling and memory planning: decide work and data placement across hardware resources to maximize utilization and minimize end-to-end LLM latency.
  • Fusion and dispatch: determine fusion and dispatch strategies so the hardware spends time computing rather than moving data.
  • Hardware co-design: define abstraction layers between compiler and hardware and give feedback to hardware architects during design iterations.
  • Profiling and validation: validate optimizations using simulators, FPGA prototypes, and silicon; maintain a trusted performance regression suite.
  • Cross-team handoffs: consume lowered programs from frontend compiler engineers and coordinate which ops are generated vs. implemented as hand-tuned kernels.

Requirements

Core qualifications and technical skills required or strongly preferred.

  • Must-have: Deep experience in compiler optimization or code generation for accelerators or other non-CPU targets (scheduling, tiling, fusion, resource allocation).
  • Must-have: Comfort working close to hardware with awareness of memory bandwidth, utilization, and practical performance tradeoffs.
  • Must-have: Proven track record of shipping optimizations that produced measurable performance improvements.
  • Must-have: Experience building software that targets hardware while it is still evolving (simulation through bring-up).
  • Must-have: Fluency in Python and familiarity with at least one systems language (C, C++, or Rust).

Nice-to-have:

  • Experience with PyTorch compilation stack (TorchDynamo, FX, Inductor, torch.export) or ML compilers such as IREE, TVM, or XLA.
  • Experience compiling for in-memory, spatial, or other non-von-Neumann compute targets.
  • Background with hardware design tools (logic synthesis, place-and-route) or cycle-level/performance simulators.
  • Contributions to open-source compiler or kernel projects (PyTorch, Triton, TVM, MLIR, LLVM) or publications in venues such as MLSys, ASPLOS, or CGO.

Education Requirements

Not specified.


About the Company

Company: Normal Computing

Headquarters: New York, NY, USA

Normal Computing develops software and hardware solutions for the semiconductor and AI infrastructure industries, specializing in ASICs for image and video diffusion inference and AI accelerators. The company focuses on architecture and microarchitecture of compute blocks, PE array design, ISA co-design, and FPGA prototyping.

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Date Posted: 2026-10-20