Coherent Fabric Design Engineer
Design RTL for Arm System IP coherent interconnects used in high-bandwidth mesh topologies for hyperscale, AI infrastructure, IoT, and automotive products. The role focuses on delivering scalable, configurable interconnect IP with optimized power, performance, and area (PPA).
The engineer will work within the System IP Coherent Interconnect design team and collaborate frequently with verification, implementation, performance, power, and project management teams to deliver high-quality hardware on schedule.
Mid-level. The posting does not specify years of experience but expects practical experience in fabric/interconnect design and RTL logic implementation.
Core responsibilities include RTL design, coordination with cross-functional teams, and ensuring delivered IP meets PPA and quality targets.
Must-have technical skills and constraints, followed by concise nice-to-have items.
Nice-to-have:
Minimum Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
Company: Arm
Headquarters: Cambridge, United Kingdom
ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.
