Clocking Systems Engineer, Staff

Job Title

Clocking Systems Engineer, Staff

Role Summary

The Clocking Systems Staff Engineer develops DSP and mixed-signal SerDes clocking architectures focused on clock generation, recovery, and timing synchronization. The role works across analog, digital, firmware, and validation teams to model, analyze, validate, and optimize clocking systems for high-speed communication products.

Experience Level

Senior — expects 4+ years of relevant industry experience or equivalent advanced academic experience.

Responsibilities

Key responsibilities include system-level modeling, analysis, and validation of clocking solutions and supporting silicon bring-up and correlation.

• Develop DSP and mixed-signal SerDes architectures for clock generation, clock recovery, and timing synchronization.
• Create and maintain behavioral and system-level models for PLLs, CDRs, retimers, clock distribution networks, and timing circuits.
• Analyze system performance and architectural tradeoffs; identify design margins and validation criteria.
• Build regression test frameworks and automate verification workflows to validate performance across projects.
• Support silicon bring-up and model-to-silicon correlation; investigate clocking-related performance issues.
• Improve simulation efficiency via model optimization, code enhancements, and automation.
• Collaborate with analog, digital, firmware, and validation teams to integrate clocking solutions.
• Document technical analyses, architecture decisions, and validation results.

Requirements

Must-have technical skills and experience. Degrees are listed in the Education Requirements section below.

• 4+ years relevant industry experience in clocking systems, mixed-signal design, SerDes, or related areas (or equivalent advanced academic experience).
• Strong understanding of digital/mixed-signal PLLs and clocking architectures, CDR architectures, jitter and phase noise analysis, and clocking calibrations.
• Experience developing behavioral or system-level models using MATLAB, Python, and SystemVerilog.
• Experience improving simulation and verification efficiency, including automation and regression frameworks.
• Excellent communication and cross-functional collaboration skills.

Nice-to-have:

• Experience with DSP-based 112G, 224G, or higher-speed SerDes architectures.
• Knowledge of analog/mixed-signal PLL building blocks (phase detectors, phase interpolators, DCOs).
• Digital design and RTL development experience, including bit-accurate modeling and efficient hardware implementation.
• Experience with silicon validation and model-to-silicon correlation.

Education Requirements

Bachelor's degree in Engineering, Information Systems, Computer Science, or related field (with 4+ years systems engineering experience) OR Master's degree in those fields (with 3+ years experience) OR PhD in those fields (with 2+ years experience). Preferred: Master's or PhD in Electrical Engineering or related field. Equivalent practical/advanced academic experience is acceptable as stated above.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.