Chip Lead

Job Title

Chip Lead

Role Summary

Technical lead responsible for the architecture, design, integration, and delivery of complex wireless System-on-Chip (SoC) products from definition through tapeout, silicon bring-up, and production.

Work hands-on with cross-functional engineering teams to drive subsystem design, IP integration, verification, physical implementation, and design closure while managing technical risks and dependencies across global teams.

Experience Level

Senior - requires extensive senior-level SoC design and delivery experience; hiring guidance indicates 12+ years of relevant experience.

Responsibilities

Deliver and lead the end-to-end technical execution for wireless SoC projects, coordinate across functions, and ensure readiness for tapeout and production.

• Define SoC architecture and translate product requirements into technical design goals and tradeoffs.
• Create and track chip design execution plans, technical milestones, and risk mitigation strategies.
• Provide hands-on leadership for subsystem design, IP integration, verification, and physical implementation.
• Drive verification closure and system-level validation, including power modes and critical use cases.
• Lead silicon bring-up, validation, characterization, and production qualification; debug cross-domain silicon issues with firmware, software, RF, and analog teams.
• Coordinate design revisions and respins when required and ensure production readiness.
• Represent the design team in cross-functional meetings and drive technical action items to closure.

Requirements

Core technical skills and leadership capabilities required to deliver complex SoC projects.

• Must-have:
  • Proven experience leading full-chip SoC development and execution through tapeout and production.
  • Hands-on expertise in SoC architecture, microarchitecture, and digital design processes.
  • Experience with high-speed interfaces (USB, PCIe, Ethernet, Mobile DDR, Quad/Octa‑SPI) and common peripheral interfaces (SDIO, UART, I2S, I2C, PWM, CAN).
  • Familiarity with RISC-V and ARM processor subsystems.
  • Knowledge of design signoff flows (Lint, CDC, Formal, Synthesis, constraints, STA/timing closure) and DFT (Scan, ATPG, MBIST).
  • Low-power design methodologies (clock gating, power gating, DVFS) and SoC verification strategies.
  • Proficiency with HDLs (Verilog, SystemVerilog) and scripting (Perl, Python, Tcl, shell) for automation and debug.
  • Strong cross-functional leadership and the ability to resolve complex technical issues across hardware, firmware, and software teams.
• Nice-to-have:
  • Experience with hardware accelerators.
  • Experience coordinating with external contractors and geographically distributed teams.

Education Requirements

Bachelor's or Master’s degree in Electrical Engineering or Computer Engineering. The role expects approximately 12+ years of relevant industry experience.

About the Company

Company: Silicon Labs

Headquarters: Austin, Texas, USA

Silicon Labs is a leading innovator in low-power wireless connectivity, creating embedded technology that connects devices to improve lives. With a focus on advanced edge connectivity applications, the company provides device makers with cutting-edge solutions and support. Headquartered in Austin, Texas, Silicon Labs operates in over 16 countries, serving markets such as smart home, industrial IoT, and smart cities.