Chief Engineer, Prototype System Integration and Experimentation

Job Title

Chief Engineer, Prototype System Integration and Experimentation

Role Summary

Lead the technical execution and long-term stewardship of Neurophos's first fully integrated prototype optical computing system. You will own end-to-end system performance, interface definitions, integration and laboratory bring-up, and the experimental platform used to evaluate architecture choices.

Work closely with internal hardware, firmware, and modeling teams and with external suppliers; report to the Chief Technology Officer.

Experience Level

Senior - requires extensive senior-level experience. The role requests 15+ years of professional experience with at least 3 years as the responsible system-level engineer or technical lead.

Responsibilities

Primary duties involve system-level ownership from architecture through experimental characterization and long-term platform maintenance.

• Own and maintain the end-to-end system performance budget and trace top-level requirements into subsystem allocations.
• Define and control system architecture, requirement sets, and interface control documents across electrical, optical, mechanical, thermal, and data domains.
• Provide technical oversight of external design houses, suppliers, and vendors; review schematics, BOMs, layouts, and analysis packages.
• Review and critique mixed-signal/high-speed electronic, optical, and opto-mechanical designs for correctness, manufacturability, and margin.
• Ensure firmware and host software meet hardware requirements; review control/data paths, timing, registers, and calibration hooks.
• Plan and lead integration, laboratory bring-up, verification, and validation; correlate measured performance with predicted budgets and troubleshoot root causes.
• Design and run controlled experimental campaigns to quantify how optical and electrical impairments affect end-to-end computational accuracy.
• Support experimentation of alternative mathematical encodings and translate results into architectural recommendations for future products.
• Maintain the prototype as a long-lived, instrumented, reconfigurable measurement platform with documented uncertainty and repeatable procedures.
• Maintain program documentation, verification matrices, technical risk register, and drive closure of open items; mentor engineers across disciplines.

Requirements

Must-have technical and leadership qualifications; preferred items listed separately.

• 15+ years developing complex multidisciplinary hardware systems and at least 3 years as the responsible system-level engineer or technical lead.
• Proven ability to construct and defend quantitative performance budgets (link, noise, error, timing, power) and flow requirements to subsystems.
• Deep working knowledge of analog and high-speed electronics: data-converter interfacing, transmission lines/termination, amplifier/front-end design, power integrity, and signal integrity.
• Solid understanding of optical system fundamentals: sources, free-space and fiber propagation, electro-optic modulation, photodetection, optical power budgets, and alignment tolerances.
• Ability to design rigorous experiments, handle measurement uncertainty, and perform sensitivity analysis; familiarity with statistical design of experiments.
• Experience acting as the technical authority over external design houses and vendors, including specification writing and deliverable acceptance.
• Working fluency in Python and/or MATLAB for budgeting, test automation, data analysis, and system modeling.
• Practical understanding of embedded firmware, FPGA-based control, and host software interfaces sufficient to specify and review software against hardware needs.
• Excellent technical communication, documentation skills, and the temperament to make and defend cross-discipline architectural decisions.

Nice-to-have / preferred (concise):

• Experience owning a long-lived laboratory testbed or experimental platform used by multiple teams.
• Experience with high-channel-count electrical/optical systems, fiber assemblies, opto-mechanical tolerancing, and RFSoC/FPGA platforms.
• Background in silicon photonics, optical transceivers, coherent/direct-detection links, modulation formats, and calibration architectures.
• Familiarity with Monte Carlo analysis, error budgeting, and correlating behavioral models with measured hardware.
• Experience running formal gate reviews (PDR/CDR-style) across internal teams and external suppliers.

Education Requirements

BS required; MS or PhD strongly preferred in Electrical Engineering, Optical Engineering, Applied Physics, or a closely related technical field. The posting also accepts equivalent advanced degrees in closely related disciplines.

About the Company

Company: Neurophos

Headquarters: Sunnyvale, California, United States

Startup developing silicon-photonic AI accelerator chips that use programmable metasurfaces and dense optical cells to perform matrix multiplications at the speed of light, targeting large-scale AI inference with much higher energy efficiency and performance than traditional electronic approaches.