Atom CPU Layout Design Engineer
The Atom CPU Layout Design Engineer will perform physical layout implementation for memory compilers, custom IP blocks, and layout partitions that support Atom CPU products. The role involves translating schematics to optimized layouts and delivering high-quality, manufacturable physical designs across leaf, block, and top-level integration.
This position is part of a silicon design team within the Silicon and Platform Engineering Group (SPE). The team collaborates with circuit designers, SoC teams, and cross-site groups to ensure alignment, reuse, and consistency across projects.
Entry-level. Requires at least 6 months of layout design experience; candidates with internship or equivalent practical experience are considered.
Key responsibilities include executing and improving physical layout design work for CPU projects and collaborating with cross-functional teams.
Must-have technical skills, eligibility, and language requirements. Preferred items are listed separately.
Required: Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field. Preferred: Master's in Electronic/Microelectronic Engineering, Computer Engineering, or related engineering discipline. Equivalent education may be satisfied by a combination of industry experience, internships, coursework, or research.
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
