Atom CPU Layout Design Engineer
Design and implement physical layouts for memory compilers, custom IP blocks, and layout partitions for Intel Atom microprocessors. Work on leaf‑level cell layout through block and top‑level integration as part of a cross‑site SoC/layout engineering team.
On-site role based in Guadalajara; responsibilities include collaborating with circuit designers, improving automation/scripts, and ensuring layout follows best‑in‑class methodologies.
Entry-level / Early career — minimum ~6 months layout design experience required; role is open to candidates with limited industry experience or internships.
Core responsibilities include physical layout implementation, cross-team integration, and productivity improvements.
Must-have skills, experience, and conditions for initial consideration; preferred items listed separately.
Minimum: Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field. Preferred: Master’s degree in Electronic/Microelectronic Engineering, Computer Engineering, or related engineering discipline. Requirements may be met through a combination of industry experience, internships, coursework, or research.
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
