Associate FPGA Engineer

Job Title

Associate FPGA Engineer

Role Summary

Design and verify FPGA-based digital logic for small-satellite avionics, supporting the hardware development lifecycle from RTL and SoC integration through board bring-up, testing, and production. Work on a multidisciplinary program team reporting to the Lead Principal Engineer.

Primary focus areas include FPGA development and verification, lab-based hardware bring-up, and contributing to hardware architecture and design reviews.

Experience Level

Entry-level / Associate. Academic or internship FPGA experience may substitute for industry experience; no specific years required.

Responsibilities

Accountabilities include FPGA RTL design and verification, hardware bring-up support, and participation in system and board-level reviews.

• Develop and verify VHDL/Verilog/SystemVerilog RTL and top-level FPGA/SoC block diagrams.
• Create device constraints, run synthesis, place-and-route, and generate FPGA device images using Vivado and/or Libero.
• Perform static timing analysis, achieve timing closure, and document compilation results and warnings.
• Support laboratory board bring-up, debugging, and performance characterization on development kits and custom hardware.
• Develop test scripts and embedded software for Linux and bare-metal platforms to validate hardware function.
• Review FPGA device fitness, estimate resource utilization and power, and provide input on schematics and PCB designs (pin assignments, clocks, resets, high-speed interfaces).
• Support make-vs-buy trade studies for third-party IP and participate in board/unit design reviews and cross-disciplinary integration.
• Travel occasionally (~20–25%) and perform on-site work in the University Park (State College), PA electronics laboratory as needed.

Requirements

Must-have technical skills and program eligibility; academic internships may substitute for professional experience.

• Familiarity coding structural and behavioral architectures in VHDL, Verilog, or SystemVerilog.
• Familiarity with AMD Xilinx Vivado and/or Microchip Libero toolflows, including SoC integration and IP utilization.
• Experience with synthesis, timing analysis, place-and-route, and generating FPGA images.
• Proficiency with Git for source control.
• Programming experience in C, C++, and Python for verification and test scripting.
• Strong oral and written technical communication skills.
• Ability to obtain and maintain a U.S. government security clearance; active Secret or higher is highly desirable.
• U.S. citizenship required.

Education Requirements

Bachelor's degree in a STEM field or related area. Academic and/or internship FPGA experience may be accepted in lieu of industry work experience.

About the Company

Company: Airbus US Space & Defense

Provides satellite, laser-communication, rotor and fixed-wing solutions for U.S. defense, security, space, and intelligence customers. A long-standing U.S. government partner, delivering engineering, manufacturing and mission-focused systems and services.