Job Title
Associate Engineer, Physical Design
Role Summary
The Associate Engineer, Physical Design performs entry-level physical design and layout tasks to support ASIC development. The role works within a semiconductor layout team to implement layouts, assist with physical verification, prepare layout data for manufacturing, and support tool and technology migration activities.
Reports to senior physical designers and participates in verification, tape-out preparation, and design-flow automation while developing practical skills in semiconductor physical design.
Experience Level
Entry-level β 0β2 years of experience in ASIC layout, physical design, or a related role.
Responsibilities
Primary responsibilities include executing routine layout tasks, supporting verification, and maintaining design data and tools.
- Support physical layout of standard cells, memory blocks, and basic circuit elements; implement layouts from schematics and specifications.
- Assist with placement, routing, floorplanning, and power distribution network development.
- Support physical verification activities (DRC, LVS), document results, and help resolve basic violations.
- Prepare layout data for manufacturing, assist with DFM checks, mask data preparation, and tape-out data transfer.
- Support EDA tool environments: design kit implementation, library maintenance, technology files, and basic flow automation.
- Assist with technology migration and porting of designs between process nodes; document process differences and layout adjustments.
- Participate in technical training and development to build physical design expertise.
- Occasional travel between company facilities; minimal overall travel (less than 5%).
Requirements
Must-have technical skills and attributes to perform the role.
- Basic knowledge of ASIC physical design principles and layout methodologies.
- Experience using physical design and verification tools / EDA environments.
- Ability to read and interpret schematics, design specifications, and technical documentation.
- Attention to detail, accuracy in layout implementation, and good organizational skills.
- Effective written and verbal technical communication and basic problem-solving skills.
- Willingness to learn semiconductor manufacturing processes, design rules, and layout best practices.
Nice-to-have:
- Familiarity with DRC/LVS verification and mask preparation workflows.
- Basic understanding of semiconductor devices and circuit operation.
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field is required. The role specifies 0β2 years of relevant experience.
About the Company
Company: Semtech
Headquarters: Camarillo, California, USA
Semtech Corporation is a high-performance semiconductor company providing IoT systems and Cloud connectivity solutions. The company focuses on delivering innovative technology solutions that support a smarter, more connected, and sustainable planet, with a dedication to quality across infrastructure, industrial, and consumer markets.

Date Posted: 2026-05-12