Associate ASIC and/or FPGA Design and Verification Engineer

Job Title

Associate ASIC and/or FPGA Design and Verification Engineer

Role Summary

Work on the Boeing Electronic Products team to design, implement, verify and validate ASICs and FPGAs used across Boeing product lines (space, launch, avionics, missiles, and autonomous systems). The role supports digital micro-architecture, HDL implementation, verification, and hardware integration for production designs.

This is an engineering role focused on technical delivery and collaboration with cross-functional teams; the selected candidate will work onsite at one of the listed Boeing locations and must be able to obtain required U.S. security clearance.

Experience Level

Entry / Associate level. Typical experience: approximately 2 or more years of related work experience or equivalent combination of education and experience.

Responsibilities

Primary responsibilities include design, verification, and integration of digital ASIC and FPGA designs from block-level architecture through hardware validation.

• Develop FPGA/ASIC designs and verification environments supporting design and verification teams.
• Implement designs from micro-architecture and HDL coding through physical design (ASIC gate‑level netlists where applicable).
• Integrate DSP and third‑party IP blocks into designs.
• Perform static timing analysis, linting, formal checks (LEC), and CDC analysis to meet schedule and quality targets.
• Develop functional coverage models and perform code coverage analysis in simulation.
• Create self-checking, reusable testbenches using OOP concepts and UVM components (drivers, sequencers, monitors, scoreboards).
• Support FPGA-based prototyping, hardware integration tests, and system-level validation with test equipment and testbeds.

Requirements

Must-have technical skills, security and workplace requirements are listed below. Preferred skills are noted separately.

• Must-have: Experience with ASIC/FPGA design or verification and delivery of production designs; experience implementing and functionally verifying designs using SystemVerilog.
• Experience with hardware-based integration and test of ASIC/FPGA designs and validating designs in hardware.
• Ability to perform static timing analysis, linting, CDC, LEC, and other sign-off checks.
• Proven ability to develop self-checking testbenches and functional coverage models.
• Ability to work 100% onsite at the selected Boeing location.
• Ability to obtain a U.S. security clearance; U.S. citizenship is required.

Nice-to-have (preferred):

• Experience with hardware emulators (e.g., Palladium) and hardware verification languages including SystemVerilog Assertions.
• Experience with high-speed SerDes interfaces (JESD204C, PCIe, Ethernet).
• Proficiency with scripting (Make, Perl, Python), revision control (svn, cvs, git), and Linux environments.
• Familiarity with space-based design techniques and radiation mitigation and a track record of first-pass ASIC success.

Education Requirements

Required: Bachelor's degree (B.S.) or equivalent in Engineering (electrical, mechanical, aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry, or a related technical field; equivalent practical experience accepted. Preferred: Master's degree in EE, Computer Engineering/Science or related field. ABET accreditation preferred where applicable.

About the Company

Company: Boeing

Headquarters: Arlington, Virginia, United States

Large U.S. aerospace and defense company that designs, manufactures, and services commercial airplanes, military aircraft, satellites, and related systems and services worldwide.