ASICS DV Engineer (Senior to Sr Staff)

Job Title

ASICS DV Engineer (Senior to Sr Staff)

Role Summary

Work on verification of Ethernet switching and networking ASICs across module, subsystem and system levels within the ASICS Engineering team. The role focuses on developing testbenches and testcases, collaborating with architecture and RTL design teams, and supporting pre- and post-silicon debug.

Experience Level

Senior level. Posting indicates a broad experience range (approximately 2–15 years of ASIC verification); minimum qualifications specify multi-year experience depending on degree (see Education Requirements).

Responsibilities

Key responsibilities include verification, collaboration with design teams, and mentorship.

• Develop testbenches and testcases for Ethernet switch verification at module, subsystem and system levels.
• Define and execute verification plans; drive coverage closure and debug verification failures.
• Collaborate with architecture and RTL design teams on micro-architecture, testplans and verification closure.
• Support pre-silicon and post-silicon debug for design/validation teams.
• Mentor junior engineers and promote best engineering practices.

Requirements

Must-have technical skills and attributes; items marked as preferred are desirable but not mandatory.

• Hands-on ASIC verification experience using SystemVerilog and UVM; strong familiarity with SVA and coverage-driven methodologies.
• Experience with emulation and FPGA-based validation flows.
• Practical experience with Ethernet switching / networking ASICs, including packet classification and forwarding pipelines, buffer management and QoS mechanisms.
• Knowledge of networking protocols such as Ethernet, VLAN, TCP/IP, tunneling, and TSN.
• Familiarity with L2/L3 forwarding, bridging, routing and packet processing pipelines.
• Strong debugging and system-level problem-solving skills.
• Good communication and teamwork skills; able to work under tight schedules and stress.
• Preferred: scripting experience (C/C++, Tcl, Perl); prior experience with merchant silicon or switching ASICs (Broadcom/Marvell/Realtek/MTK or similar).
• Fluency in Chinese and English, both verbal and written.

Education Requirements

MS/BS in Electrical Engineering is stated (MS preferred). Minimum qualifications specify degree-plus-experience alternatives: Bachelor's in Science/Engineering or related field with 6+ years relevant ASIC design/verification/validation/integration experience; OR Master's with 5+ years; OR PhD with 4+ years. (These degree-and-years requirements are the posted minimum qualifications.)

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.