ASICS Design Verification Engineer

Job Title

ASICS Design Verification Engineer

Role Summary

Responsible for the full verification lifecycle of digital power IPs from system-level concept through tape-out and post-silicon support. The role focuses on pre-silicon test planning, testbench and coverage development, assertion and formal verification, power-aware UPF verification, and automation to increase verification efficiency.

Position sits in the ASICS Engineering team within Qualcomm's Engineering Group and works with RTL designers, architects, and validation teams.

Experience Level

Mid-level. The posting specifies a baseline of approximately 2+ years of relevant ASIC design and verification experience; stronger candidates with 6+ years are preferred for more advanced responsibilities.

Responsibilities

Key responsibilities include:

• Plan and execute pre-silicon verification for digital power IPs.
• Develop block-level testbenches using SystemVerilog and UVM methodologies.
• Create and maintain functional coverage models and assertion checks.
• Apply assertion-based formal verification / property checking where appropriate.
• Implement power-aware verification flows using UPF and related methodologies.
• Support post-silicon validation and debug activities.
• Develop automation and scripting to improve verification efficiency and repeatability.
• Collaborate with cross-functional teams to resolve design and verification issues.

Requirements

Must-have and desirable skills:

• 2+ years of hands-on ASIC design or verification experience with industry tools, techniques, and methodology.
• Experience developing testbenches with SystemVerilog and UVM.
• Practical experience with functional coverage and assertion development.
• Familiarity with formal verification / property checking and integrating assertions into flows.
• Experience with power-aware verification flows (UPF) or willingness to adopt these methodologies.
• Strong debugging and validation skills, including post-silicon support.
• Nice-to-have: experience with RTL languages (Verilog/VHDL), C/C++ programming, AMBA protocols (AXI/AHB/APB), and scripting for automation (Perl or Python).

Education Requirements

Education pathways noted in the posting: Bachelor's degree in Science, Engineering, or a related field (common example fields: Electrical Engineering, Computer Engineering, Computer Science) with ~2+ years of ASIC design/verification experience; a Master's degree in a related technical field (Computer Science, Electrical Engineering, Computer Engineering, or similar) is listed as preferred and may be combined with reduced experience requirements; a PhD in a related field is also acceptable.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.