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ASIC Verification - Staff Engineer

Synopsys
November 5, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Verification Jobs, Level - Senior

Job Title

ASIC Verification - Staff Engineer

Role Summary

Lead the design and implementation of advanced verification environments for DesignWare IP cores. Work within the DesignWare IP Verification R&D team to define and execute verification strategies that ensure IP quality for commercial, enterprise, and automotive markets.

Focus areas include SystemVerilog-based HVL testbenches, coverage-driven verification, regression management, and automation to accelerate verification closure.

Experience Level

Senior-level. Typically 5+ years of relevant ASIC/IP verification experience.

Responsibilities

Primary responsibilities include specification, implementation, and execution of verification environments and test plans.

  • Specify, architect, and implement SystemVerilog-based verification environments and testbenches.
  • Develop and execute unit- and system-level test plans and regression suites.
  • Design functional coverage models and perform coverage analysis to meet quality targets.
  • Debug complex RTL and verification failures; drive issues to closure with RTL designers.
  • Automate verification flows and reporting using scripting to improve efficiency.
  • Contribute to VIP development, methodology improvements, and formal verification approaches.
  • Collaborate with global, multi-site teams and mentor junior engineers.

Requirements

Must-have technical skills and experience for this role.

  • Expertise in developing HVL (SystemVerilog) based verification environments and testbenches.
  • Hands-on experience with industry simulators and debug tools (e.g., VCS, NC, MTI).
  • Proficiency in verification methodologies such as UVM, OVM, or VMM; exposure to formal verification is desirable.
  • Practical knowledge of protocols: MIPI-I3C, UFS/Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, USB.
  • Scripting experience (Perl, TCL, Python) and familiarity with Verilog; experience in VIP development a plus.
  • Experience with functional coverage-driven methodologies, regression management, and verification metrics.
  • Strong debugging, analytical, verbal and written communication skills; effective in multi-site teams.

Education Requirements

Bachelor of Science in Electrical/Electronics Engineering (BSEE) with 5+ years relevant experience, or Master of Science in Electrical/Electronics Engineering (MSEE) with 3+ years relevant experience; or equivalent practical experience.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-11-01