ASIC Verification Engineer

Job Title

ASIC Verification Engineer

Role Summary

Join the Networking Silicon verification team to develop and execute verification for high-speed ASICs and SoCs used in routers and switches. You will own block- and subsystem-level verification from test planning through coverage closure and work with cross-functional teams to deliver production-quality silicon.

This is a hybrid role based in Durham, NC with an expected in-office cadence of approximately 2 days per week.

Experience Level

Mid-level — requires 3+ years of ASIC/SoC verification experience.

Responsibilities

Primary responsibilities include designing verification environments, executing tests, and debugging to validate functionality and meet coverage goals.

• Lead block- or subsystem-level verification: create test plans and drive coverage closure.
• Develop, enhance, and maintain UVM verification environments (agents, sequences, scoreboards, register models, virtual sequences).
• Implement constraint-driven random testing, functional coverage, and assertions (SVA).
• Run simulations and analyze waveforms using tools such as Cadence Xcelium, Synopsys VCS, or Mentor Questa.
• Debug complex SoC designs and collaborate with design and cross-functional teams to resolve issues.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Minimum 3+ years in ASIC/SoC verification, with ownership from test plan to coverage closure.
• Strong SystemVerilog and UVM skills, including building environments from scratch.
• Solid knowledge of randomization, constraints, functional coverage, and SVA assertions.
• Hands-on experience in test planning, coverage analysis, and debugging complex SoC designs.
• Proficiency with industry simulation and waveform-debug tools (Cadence Xcelium, Synopsys VCS, Mentor Questa).

Nice to have:

• Experience verifying networking ASICs (packet processing, forwarding engines, fabric interfaces).
• Familiarity with high-speed interconnects, buffers, scheduling pipelines, emulation, or hardware acceleration.
• Knowledge of coverage analytics, regression dashboards, CI flows (e.g., Jenkins), UPF low-power flows, or formal verification.
• Post-silicon bring-up and debug experience.

Education Requirements

Not specified.

About the Company

Company: Hewlett Packard Enterprise

Headquarters: Spring, TX, United States

Global enterprise technology company delivering hybrid cloud, edge-to-cloud platforms, servers, storage, networking, and IT services to help organizations build, run, and secure applications and infrastructure at scale.