ASIC Verification Engineer

Job Title

ASIC Verification Engineer

Role Summary

Member of Technical Staff on the ASIC verification team responsible for verification strategy, environments, and signoff for silicon, IP, and subsystem development. Works cross-functionally with architecture, design, physical design, firmware, DFT, post-silicon validation, IP vendors, foundries, and EDA partners.

Early-stage hardware role with strong technical ownership to drive verification from microarchitecture through tapeout.

Experience Level

Mid-level — typically requires around 5+ years of ASIC or SoC verification experience.

Responsibilities

Core responsibilities include planning and executing verification activities across IP, subsystem, and SoC scopes.

• Define and implement verification methodology for IP, subsystem, and SoC designs.
• Own verification planning from microarchitecture through simulation, closure, and tapeout.
• Build and maintain verification environments, testbenches, checkers, scoreboards, coverage models, and regression suites.
• Drive functional verification, coverage closure, debug, and signoff for critical blocks and subsystems.
• Conduct design and verification reviews to enforce technical rigor and best practices.
• Collaborate with architecture, design, physical design, firmware, DFT, and post-silicon teams for system-level correctness and bring-up readiness.
• Coordinate with external IP vendors, foundries, and EDA providers to resolve dependencies and execution risks.
• Improve automation, scripting, and flow integration to increase verification efficiency and quality.
• Help establish verification standards, culture, and technical practices for an early hardware organization.

Requirements

Must-have technical skills and experience for immediate contribution.

• 5+ years of ASIC or SoC verification experience.
• Strong technical expertise in modern verification methodologies and flows.
• Experience verifying complex IP, subsystems, or SoCs from microarchitecture through tapeout.
• Practical knowledge of the full ASIC development lifecycle, including design, verification, physical implementation, DFT, tapeout, and post-silicon bring-up.
• Hands-on experience with simulation, debug, coverage closure, regression management, and verification signoff.
• Experience with front-end development tools and scripting to automate verification flows.
• Ability to coordinate multiple projects, manage risks, and meet aggressive schedules; strong communication and stakeholder management skills.

Nice-to-have

• Experience with SystemVerilog, UVM, constrained-random verification, assertions, formal verification, or emulation.
• Familiarity with high-speed interfaces and protocol stacks such as Ethernet, UCIe, UALink, PCIe, or CXL.
• Experience integrating/verifying interconnect, I/O, memory, or accelerator subsystems and tapeout on advanced silicon.
• Post-silicon validation or silicon debug experience, knowledge of DFT and manufacturing test.
• Experience working with external design partners, IP vendors, foundries, and EDA tool providers; experience optimizing verification for power, performance, and area.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field is specified. A PhD in a related field is listed as a strong/optional qualification.

About the Company

Company: Acceler8

A talent acquisition and recruiting agency specializing in sourcing engineering and technology candidates for startups and high-growth companies, particularly across hardware and AI infrastructure roles.