ASIC Verification Engineer
The ASIC Verification Engineer will design and execute verification efforts for VLSI/ASIC components across the full development lifecycle. The role works on a project team with electronic and VLSI engineers, internal and outsourced partners, and is expected to contribute to architecture-level verification, implementation-level verification, and system validation.
This position is hybrid with an expectation of approximately two days per week in an HPE office (Durham, NC).
Mid-level β typically requires 3+ years of experience in VLSI/ASIC verification, specifically using SystemVerilog and UVM.
Primary responsibilities include verification planning, implementation, and reporting for complex VLSI designs.
Must-have technical skills and experience:
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent technical field; equivalent practical experience is acceptable. Coursework or background in VLSI design or VLSI concepts is expected.
Company: Hewlett Packard Enterprise
Headquarters: Spring, TX, United States
Global enterprise technology company delivering hybrid cloud, edge-to-cloud platforms, servers, storage, networking, and IT services to help organizations build, run, and secure applications and infrastructure at scale.
