ASIC Verification Engineer

Job Title

ASIC Verification Engineer

Role Summary

Work on verification of System-on-Chip (SoC) designs for Cisco's Silicon One group. Build UVM-based verification environments, define verification strategies, and drive verification from block to system level to achieve first-time-right silicon.

Collaborate with architects, RTL designers, and firmware teams in a cross-functional environment to plan, execute, and debug verification activities.

Experience Level

Mid-level: 5–12 years of industry experience in ASIC/SoC verification.

Responsibilities

Accountable for verification planning, environment development, and debug across block and system levels.

• Develop and implement UVM-based verification environments and testbenches.
• Create and execute comprehensive verification plans at block and system levels.
• Design verification components including assertions, traffic generators, agents, and scoreboards.
• Collaborate with cross-functional teams to assess design testability and verification requirements.
• Lead debug efforts and resolve complex design and verification issues.
• Perform timing and gate-level simulations and analyze results.
• Support post-silicon bring-up by delivering C firmware and debug support as required.

Requirements

Key technical skills and practical verification experience required or preferred.

• Must-have: UVM-based testbench development and strong SystemVerilog coding skills.
• Must-have: Practical ASIC/SoC verification experience, including development of test plans and verification infrastructure.
• Must-have: Experience with assertions, traffic generators, agents, scoreboards, and block-to-system verification flow.
• Must-have: Timing and gate-level simulation experience and strong root-cause debug skills.
• Must-have: C coding experience to support firmware for post-silicon bring-up.

Nice-to-have:

• Experience with formal verification techniques (abstraction and end-to-end checking).
• Scripting for automation (Python or Perl) and experience applying CAD efficiency improvements (including AI-based initiatives).
• Experience with high-speed serial protocols (UCIe, PCIe) and analog debug including DAC/ADC calibration and white-box verification.

Education Requirements

Bachelor's degree in Electrical Engineering or a related field is expected; a Master's degree in electrical or communications engineering is preferred. (Equivalent practical experience not specified.)

About the Company

Company: Elantis