ASIC/SOC Silicon Physical Design Engineer
MatXJob Title
ASIC/SOC Silicon Physical Design Engineer
Role Summary
Work on MatX's Hardware team to develop physical implementations of ASIC/SoC designs that meet performance, power, and area targets for high-performance AI products. The role spans block, subsystem, and chip-level physical design from RTL to GDSII.
This is a hybrid role based in Mountain View; candidates must be authorized to work in the United States and be onsite in Mountain View Tuesdays–Thursdays.
Experience Level
Senior — minimum 8 years industry experience in ASIC Physical Design.
Responsibilities
Deliver and drive physical design activities across block, subsystem, and chip levels; lead reviews and report progress toward tapeout milestones.
- Develop and improve Physical Design methodology for block, subsystem, and full-chip flows.
- Own physical implementation tasks: partitioning, floorplanning, synthesis, place & route, and clocking.
- Execute sign-off activities: equivalency, extraction, timing sign-off, power estimation, EMIR, and physical verification.
- Plan and lead intermediate and sign-off reviews; report execution against milestones such as design freeze and tapeout.
- Collaborate with Design, Verification, and DFT teams to optimize partitioning and PPA for sign-off.
Requirements
Must-have technical skills and experience.
- Minimum 8 years of industry experience in ASIC physical design, including block, subsystem, or full-chip work.
- Proven expertise driving physical design construction and sign-off from early RTL to production silicon.
- Strong proficiency in scripting and automation: Perl, Python, and TCL.
- Hands-on experience with partitioning, floorplanning, synthesis, place & route, clocking strategies, timing closure, power estimation, extraction, and physical verification.
- Excellent interpersonal and communication skills; able to coordinate across multiple engineering teams.
- Nice-to-have: experience working with third-party design services partners.
Education Requirements
Bachelor of Science in Electrical Engineering (or equivalent) is stated; equivalent practical industry experience is acceptable. Field referenced: Electrical Engineering. No other degrees or certifications are specified.
About the Company
Company: MatX
Headquarters: Mountain View, California, USA
MatX specializes in creating faster chips for large language models (LLMs), focusing on innovative hardware and software solutions. The company fosters a collaborative and supportive work environment, welcoming candidates of all experience levels. Their approach prioritizes deep understanding and consideration of novel methods to drive efficiency and performance in their projects, particularly in silicon design and related engineering roles.
