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ASIC/SOC DFT Engineer (Silicon Engineering)

SpaceX
August 07, 2026
Full-time
On-site
Palo Alto, California, United States
$135,000 - $210,000 USD yearly
DFT Jobs, Level - Entry or Early Career

Job Title

ASIC/SOC DFT Engineer (Silicon Engineering)

Role Summary

Work on design-for-test (DFT) integration, ATPG, scan insertion, and post-silicon test content for next-generation ASICs used in Starlink satellite and ground systems. Collaborate with architecture, RTL design, physical design, ATPG and manufacturing teams to ensure high scan coverage and testability in silicon.

Experience Level

Entry-level β€” guidance: 1+ years of professional ASIC experience.

Responsibilities

Primary responsibilities include evaluating and improving testability from RTL through physical implementation and supporting post-silicon validation.

  • Evaluate design readiness for scan insertion using RTL and physical-design Scan DRC tools.
  • Integrate and verify DFT fabrics and IP within subsystems.
  • Run and refine scan insertion flows through synthesis tools to maximize coverage.
  • Run ATPG analysis and create ATPG content for post-silicon testing.
  • Run and debug non-timing and SDF-annotated gate-level simulations.
  • Collaborate with physical design, ATPG, and manufacturing teams to resolve issues affecting coverage and yield.

Requirements

Core required skills and constraints followed by preferred skills.

  • Must-have: 1+ years professional experience working with ASICs.
  • Must-have: Practical experience with scan insertion or DFT setup and running ATPG flows.
  • Must-have: Ability to run and debug gate-level simulations (including SDF-annotated sims).
  • Must-have: Willingness to work extended hours and weekends as needed.
  • Must-have: ITAR/export-eligibility: U.S. citizen, U.S. lawful permanent resident, refugee, asylee, or otherwise eligible for required U.S. Department of State authorizations.
  • Nice-to-have: Scripting skills (bash, Perl, Python) for automation.
  • Nice-to-have: Familiarity with Verilog/SystemVerilog and ASIC implementation flows.
  • Nice-to-have: Knowledge of UPF, formal verification, and DRC rule checking.
  • Nice-to-have: Experience with high-reliability design and manufacturing-focused verification.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science.

SpaceX is an Equal Opportunity Employer.


About the Company

Company: SpaceX

Headquarters: Hawthorne, California, United States

SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.

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Date Posted: 2026-08-07