Job Title
ASIC/SOC CAD Engineer
Role Summary
Join MatX's physical design and CAD team to build and maintain RTL-to-GDSII flows and infrastructure for high-performance silicon targeting GenAI workloads. The role focuses on creating automated, reliable flows and collaborating with tool vendors and chip teams to deliver performant, functionally correct ASICs.
Experience Level
Senior — minimum 8 years of industry experience in ASIC Physical Design.
Responsibilities
Primary responsibilities include developing, operating, and improving back-end physical design and CAD infrastructure.
- Develop, maintain, and improve the physical design (RTL-to-GDSII) flow, including construction and sign-off.
- Automate back-end runs, post-process logs, generate metrics, and produce actionable reports and dashboards.
- Evaluate, select, and deploy EDA tools and methodologies to optimize performance, power, and area.
- Work with EDA vendors to resolve issues and drive product improvements.
- Train and support flow users; troubleshoot and resolve user issues.
- Manage licenses, compute, and storage resources; optimize for efficiency and cost.
- Contribute to front-end CAD flow development and support as needed.
- On-site collaboration required: work from Mountain View office three days per week (Tuesday–Thursday).
Requirements
Must-have skills and experience for successful performance in this role.
- Minimum 8 years industry experience in ASIC physical design or CAD engineering.
- Proven expertise with industry-standard physical design tools and sign-off flows (partitioning, floorplanning, synthesis, place & route, STA, extraction, power analysis, physical verification).
- Strong scripting and programming skills (Python, TCL, Perl or equivalent).
- Experience selecting and deploying EDA tools and methodologies to meet PPA targets.
- Experience with EDA license management, job schedulers (LSF or equivalent), and cloud-based silicon development is a plus.
- Good interpersonal and communication skills; ability to train and support engineers using the flow.
- Ability to manage compute and storage for large-scale back-end runs and optimize cost/efficiency.
- Applicants must be authorized to work in the United States and able to comply with U.S. export control requirements for the role.
Education Requirements
Bachelor of Science in Electrical Engineering or equivalent practical experience. The posting explicitly states BS in Electrical Engineering or equivalent; no other degrees or fields were required or specified.
About the Company
Company: MatX
Headquarters: Mountain View, California, USA
MatX specializes in creating faster chips for large language models (LLMs), focusing on innovative hardware and software solutions. The company fosters a collaborative and supportive work environment, welcoming candidates of all experience levels. Their approach prioritizes deep understanding and consideration of novel methods to drive efficiency and performance in their projects, particularly in silicon design and related engineering roles.

Date Posted: 2026-07-22