ASIC RTL Design Engineer (Senior / Senior Lead)
QualcommJob Title
ASIC RTL Design Engineer (Senior / Senior Lead)
Role Summary
Design and deliver system power-management IP cores and related subsystems for Snapdragon SoCs across mobile, compute, IoT, and automotive markets. The role collaborates with Systems, Verification, SoC, Software, Power Delivery, and DFT teams to ensure functional, low-power RTL implementations and handoff through synthesis and netlist stages.
Experience Level
Senior-level engineer. Preferred experience range: approximately 3 to 8 years in ASIC/RTL design; minimum experience requirements vary by degree (see Education Requirements).
Responsibilities
Primary responsibilities include RTL and micro-architecture design, verification convergence, and design qualification.
- Micro-architecture and RTL design for IP cores and subsystems.
- Coordinate with Systems, Verification, SoC, Software, PD and DFT teams to achieve design convergence.
- Enable and support software teams to use hardware blocks.
- Qualify designs using static checks (Lint, CDC, CLP) and formal tools.
- Perform synthesis, logical equivalence checking (LEC) and netlist closure checks.
- Report status and communicate progress to management and stakeholders.
Requirements
Must-have technical skills and experience; separates critical vs. desirable qualifications.
- Must have: Strong RTL coding in Verilog/SystemVerilog for complex designs with multiple clock and power domains.
- Experience with UPF and power-domain crossing techniques.
- Experience in synthesis, LEC, RTL and netlist CLP flows.
- Familiarity with bus protocols: AHB, AXI, SPMI, I2C, SPI.
- Low-power design methodology and clock-domain-crossing (CDC) design experience.
- Experience with Spyglass lint/CDC checks and waiver creation.
- Experience with formal verification tools (e.g., Cadence LEC).
- Proficiency in scripting (Perl, Tcl, Python) and familiarity with configuration/version tools like ClearCase/ClearQuest.
- Strong written and verbal communication skills; able to work independently and in teams.
- Nice to have: Post-silicon debug experience, database management flows, deep RTL-to-GDS understanding to interact with DFT/PD teams.
Education Requirements
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 3 years of hardware engineering experience; OR Master’s degree in the same fields with at least 2 years of relevant experience; OR PhD in the same fields with at least 1 year of relevant experience.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
