ASIC/RTL Design Engineer for High-speed Interfaces
QualcommJob Title
ASIC/RTL Design Engineer for High-speed Interfaces
Role Summary
Responsible for micro-architecture, RTL design, implementation, and validation of high-speed mixed-signal interface IPs (SerDes, DDR PHY, die-to-die interconnects) used across mobile, compute, data center, and AI products. Work within a cross-functional IP team to meet power, performance, and area targets.
Collaborate with system architects, analog designers, verification and physical design teams to support pre-silicon verification and post-silicon bring-up.
Experience Level
Senior-level. Posting indicates senior candidates with roughly 7+ years of relevant RTL/ASIC design experience; experience expectations may vary by degree and specific role.
Responsibilities
Key responsibilities include:
- Define micro-architecture and implement RTL for high-speed interface IPs in coordination with system and analog teams.
- Optimize designs for power, performance, and area using architecture and DSP techniques.
- Apply front-end ASIC toolchain for lint, CDC analysis, synthesis, formal verification, and static timing analysis.
- Design and analyze DFT logic and develop ATPG strategies for stuck-at and transition delay faults.
- Produce hardware specifications and comprehensive design documentation.
- Collaborate with verification teams to define test plans, debug designs, and close functional issues.
- Support physical design activities (floorplanning, placement, timing closure) and assist in SoC integration and bring-up.
Requirements
Minimum technical qualifications and preferred skills:
- Extensive RTL and micro-architecture experience for mixed-signal/high-speed interface IPs (SerDes, DDR PHY, die-to-die interconnects).
- Deep understanding of the ASIC design flow and front-end methodologies (CDC, lint, synthesis, formal, STA).
- Experience with DFT methodologies and ATPG for test coverage.
- Proficiency with industry-standard tools such as VCS, Fusion Compiler, PrimeTime, Power Compiler, DFT Compiler, and Spyglass.
- Proven ability to collaborate across analog, verification, and physical design teams; experience with pre-silicon simulation and post-silicon debug.
- Strong documentation skills and experience creating hardware specifications.
- Nice-to-have: hands-on experience with PLLs, DACs, ADCs, and sensor interfaces.
Education Requirements
The posting references a Bachelor's degree in Science, Engineering, or a related field (with ~4+ years relevant experience), a Master’s degree (with ~3+ years), or a PhD (with ~2+ years). Fields explicitly noted include Electrical Engineering and Computer Engineering; related technical disciplines are acceptable. No specific certifications were listed.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
