ASIC Power Engineer, ML Accelerators
GoogleJob Title
ASIC Power Engineer, ML Accelerators
Role Summary
Work on power architecture and implementation for ML accelerator ASICs (TPUs) within Google's AI and Infrastructure team. The role focuses on improving silicon power efficiency and defining system-level power management to meet stringent power targets for large-scale AI workloads.
Collaborate with architecture, logic, software, and system teams to translate power goals into chip and system designs that balance performance, power, and thermal constraints.
Experience Level
Senior level. The posting specifies approximately 8 years of relevant silicon design or architecture experience.
Responsibilities
Primary responsibilities include modeling, optimizing, and validating power for ML accelerator designs, and establishing low-power design practices.
- Develop and maintain design power models and drive convergence to defined power goals.
- Investigate, specify, and deploy architectural and microarchitectural power-optimization techniques.
- Define and document best practices and methodologies for low-power ASIC design.
- Collaborate with software, architecture, and systems teams to create and validate chip- and system-level power management architectures.
- Analyze power/performance/thermal trade-offs and provide actionable recommendations to meet power targets.
Requirements
Key must-have skills and experience for this role; preferred items are noted separately.
- Must-have: ~8 years' experience in silicon design or architecture, including logic design, power architecture, performance engineering, or SoC design.
- Must-have: Hands-on experience with power design, power modeling, power architecture, or power-reduction methodologies.
- Must-have: Practical experience driving designs to meet chip-level power goals and working across teams to implement power solutions.
- Nice-to-have: Experience defining and implementing chip-wide power management architectures and mechanisms.
- Nice-to-have: Familiarity with DVFS, thermal management techniques, and system-level power/performance trade-offs.
- Nice-to-have: Demonstrated ability to solve open-ended power and performance problems under ambiguity.
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience is stated as a baseline. A Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science (emphasis on computer architecture) is listed as preferred.
About the Company
Company: Google
Headquarters: Mountain View, CA, United States
Google is a global technology company that develops Internet services and products including search, advertising, cloud computing, AI, software, hardware, and custom silicon for consumer and enterprise applications.
