ASIC Physical Design Staff Engineer
SynopsysJob Title
ASIC Physical Design Staff Engineer
Role Summary
Senior physical implementation engineer on the Digital Implementation team responsible for turning RTL into silicon for high-speed interface IP and testchips at advanced nodes (7nm, 5nm, 3nm).
The role drives RTL-to-GDS implementation, timing closure, power integrity, and automation to deliver production-ready IP for AI, automotive, HPC, cloud, 5G and IoT applications.
Experience Level
Senior — requires significant hands-on experience; the posting specifies 5+ years of ASIC physical implementation experience.
Responsibilities
Lead end-to-end digital physical implementation and support customers during integration and bring-up:
- Drive RTL-to-GDS implementation for high-speed interface IP (SerDes, DDR, HDMI, MIPI, USB) at 7nm/5nm/3nm.
- Execute synthesis, floorplanning, power planning, CTS, placement, routing, and physical verification using industry EDA tools.
- Perform static timing analysis and close timing across multiple process corners, voltages, and operating modes.
- Analyze IR drop and electromigration (EM) and iterate on power grid design; run EM/IR signoff flows.
- Develop automation and methodologies (TCL/Python/Perl/Make) to improve flow efficiency and scalability.
- Collaborate with RTL, verification, product teams and customers to resolve integration and silicon issues.
- Provide technical support during IP integration, silicon debug, and customer adoption.
Requirements
Must-have technical skills and experience; listed "nice-to-have" items are noted.
- Must: 5+ years hands-on ASIC physical implementation experience, specifically RTL-to-GDS flows using industry-standard EDA tools.
- Must: Deep understanding of IC physical implementation flows and signoff methodologies for deep-submicron designs.
- Must: Proficiency with industry data formats: Verilog, GDS, LEF, DEF, SDF, LIB, UPF/CPF, SPEF.
- Must: Strong scripting skills for automation: TCL, Python, Perl, Unix shell, and Make.
- Must: Strong written and verbal English for technical documentation and cross-functional collaboration.
- Nice-to-have: Experience with Synopsys physical design tools (Fusion Compiler, IC Compiler II, PrimeTime, StarRC).
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
