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ASIC Physical Design Manager

Synopsys
November 5, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Physical Design Jobs, Level - Senior

Job Title

ASIC Physical Design Manager

Role Summary

Lead a team of physical design engineers responsible for RTL-to-GDSII physical implementation and methodology for testchip projects that validate embedded memory IP. Deliver tape-outs by driving timing closure, power optimization, verification, and foundry interactions across multiple projects.

Experience Level

Senior - 8 to 14 years of ASIC physical design experience, including at least 2 years leading teams or managing projects.

Responsibilities

Accountabilities include technical leadership, project execution, flow development, and team mentoring.

  • Lead and grow a physical design team building and maintaining PD flows and methodology for testchips from RTL handoff to GDSII.
  • Drive execution of multiple testchip projects: timing closure, power optimization, and physical verification.
  • Develop and improve automation, scripting, and repeatable flows to accelerate closure and ensure quality.
  • Collaborate with front-end design, silicon validation, and software teams to align on design intent and resolve cross-domain issues.
  • Manage project schedules, resources, risk mitigation, and foundry interactions to meet tape-out milestones.
  • Mentor engineers on timing analysis, floorplanning, place-and-route strategies, and verification best practices.

Requirements

Must-have technical skills and experience.

  • 8–14 years of hands-on ASIC physical design experience with multiple successful tape-outs; at least 2 years leading teams or projects.
  • Deep expertise in timing closure, power optimization, and physical verification across the complete RTL-to-GDSII flow.
  • Proficiency with industry EDA tools such as Fusion Compiler / ICC2, PrimeTime or Tempus, and Calibre (DRC/LVS).
  • Experience creating design automation, scripting, and methodology improvements for physical design stages.
  • Demonstrated ability to manage people, projects, and cross-functional collaboration under schedule pressure.
  • Nice-to-have: front-end design or RTL methodology experience to bridge design intent and physical implementation.

Education Requirements

Not specified.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-11-01