ASIC Physical Design Intern - 2027
NVIDIAJob Title
ASIC Physical Design Intern - 2027
Role Summary
Internship on the ASIC physical design team working from RTL freeze through tape-out. The role supports synthesis, netlist verification, constraints definition, timing closure/sign-off, and automation of timing-closure flows.
Works cross-functionally with ASIC, PR, and validation teams to implement and verify chip partitioning, floorplan, and full-chip timing closure.
Experience Level
Entry-level internship — intended for students currently enrolled in graduate programs (Master's or PhD). Practical experience with IC physical design tools and flows recommended but not required.
Responsibilities
Typical tasks and responsibilities include:
- Integrate chip partitions and generate/validate netlists; collaborate across teams on floorplan and partitioning.
- Perform synthesis, RTL/netlist quality checks, and formal verification tasks.
- Create and validate constraints; define timing budgets and identify critical paths.
- Analyze and resolve functional timing issues; achieve special timing closure requirements (I/O, test, clock, async).
- Coordinate with PR/implementation engineers to achieve full-chip timing closure.
- Develop and improve timing-closure flow from frontend (pre-layout) to backend (post-layout).
- Automate flows and scripts to improve implementation efficiency and quality.
- Contribute to methodology development in synthesis, timing closure, and verification areas.
Requirements
Essential skills and attributes:
- Strong knowledge of IC design principles, especially physical design concepts.
- Self-driven, quick learner with the ability to work effectively in teams.
- Good problem-solving skills and attention to detail for timing analysis and closure.
- Excellent communication skills; proficient in English reading and writing.
Nice-to-have:
- Experience in IC backend implementation and timing closure.
- Hands-on experience with EDA tools (examples: Synopsys DC/PT/Formality, Cadence RC Compiler/LEC).
- Proficiency in scripting (Python or TCL) for flow automation.
Education Requirements
Currently pursuing a Master’s or PhD degree in a relevant technical field (graduate student status is required as stated in the posting).
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
