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ASIC Physical Design Engineer, Netlisting (New College Grad 2026)

NVIDIA
August 17, 2026
Full-time
On-site
Santa Clara, California, United States
Physical Design Jobs, Level - Entry or Early Career

Job Title

ASIC Physical Design Engineer, Netlisting (New College Grad 2026)

Role Summary

Entry-level physical design engineer focused on netlist-related tasks for high-frequency and low-power CPUs, GPUs, and SoCs. The role works on block-, cluster-, and full-chip physical-design activities with emphasis on equivalence checking, asynchronous/CDC checks, MTBF analysis, logic synthesis, and netlist quality.

Small, technical team supporting tapeout, ECO implementation, and flow development for production ASIC projects.

Experience Level

Entry-level / New college graduate (early-career). Suitable for recent graduates or candidates with equivalent practical experience.

Responsibilities

Primary responsibilities include ensuring netlist correctness and supporting physical-design closure.

  • Perform equivalence checking and formal verification from RTL to tapeout.
  • Execute asynchronous checks including clock-domain-crossing (CDC) analysis and MTBF analysis.
  • Assess netlist quality and perform logic-synthesis validation at block or full-chip level.
  • Support ECO generation and implementation during late-stage design iterations.
  • Collaborate with architecture, RTL, and timing teams to support timing closure and tapeout readiness.
  • Develop and maintain scripts and small tools to automate checks and improve flows.

Requirements

Technical skills and practical experience required for day-one contribution.

  • Demonstrated knowledge of logic equivalence checking and formal verification flows from RTL to tapeout using industry tools.
  • Hands-on experience with RTL/logic design principles relevant to timing closure and physical design.
  • Experience with CDC checking and MTBF analysis using EDA or in-house tools.
  • Background in logic synthesis at block or full-chip level and familiarity with synthesis flows.
  • Proficiency with scripting or programming (Perl, TCL, Make, Python, or similar) to automate tasks and debug flows.
  • Familiarity with industry EDA tools (Synopsys, Cadence, or equivalent) in related physical-design domains.
  • Nice-to-have: strong debugging/problem-solving skills, experience improving workflows with automation or AI, and prior flow-development contributions.

Education Requirements

Master's or PhD in Electrical Engineering or Computer Engineering, or equivalent practical experience.


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

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Date Posted: 2026-08-17