ASIC Physical Design Apprenticeship

Job Title

ASIC Physical Design Apprenticeship

Role Summary

This is a 12-month, full-time, in-office apprenticeship on the physical design team in Noida. Apprentices work on real digital implementation projects and collaborate with experienced engineers to learn industry-standard flows and tools.

Primary focus areas include physical implementation, timing closure, signal integrity, and design-for-manufacturability for mixed-signal IP and subsystems.

Experience Level

Entry-level apprenticeship for fresh graduates (class of 2025 or 2026). This role is intended for early-career candidates with limited industry experience.

Responsibilities

Typical duties include hands-on implementation tasks and supporting verification and manufacturability work:

• Participate in the digital implementation flow: floor-planning, timing constraints, physical synthesis, and formal verification.
• Contribute to clock tree optimization, routing, extraction, timing closure, DFT, and signal integrity analysis.
• Support physical verification and design-for-manufacturability (DFM) activities on test chips across technology nodes.
• Develop and optimize implementation flows in collaboration with senior engineers.
• Use and learn industry-leading Synopsys tools and methodologies on real projects.

Requirements

Must-have technical skills and other selection criteria:

• Good knowledge of digital logic, high-speed clocks and timing, and signal integrity.
• Strong scripting skills in Perl, Tcl, or Python.
• Understanding of CMOS/FINFET design and layouts and low-power design techniques.
• Familiarity with IC design and physical implementation flows; knowledge of deep-submicron technology is desirable.
• Ability to work full-time, in-office in Noida; available to start around July/August 2026.
• Not currently employed in a full-time position (limited internship experience acceptable).

Nice-to-have:

• Experience with Synopsys tools such as Design Compiler, ICC/ICC2/FC, PrimeTime SI, Star-RCXT, RedHawk, ICV, etc.

Education Requirements

B.E. / B.Tech in Electronics, Electrical, Instrumentation, ECE, EEE, VLSI, or a related field. Open to fresh graduates from the class of 2025 or 2026. Candidates should not be enrolled in M.Tech programs or postgraduate diplomas.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.