ASIC Physical Design and Timing Engineer - New College Grad 2026
Entry-level physical design and timing engineer joining a chip-design team to drive timing analysis, convergence, and implementation at block, cluster, and full-chip levels for GPUs, CPUs, DPUs and SoCs.
You will work across frontend and backend flows to help achieve timing closure and support design signoff in a cross-functional environment.
Entry-level β new college graduate (early career).
Primary responsibilities focus on timing analysis, closure, and implementation support across design stages.
Must-have technical skills and experience for the role.
Nice-to-have:
Master's degree or higher in Electrical Engineering or Computer Engineering (or equivalent practical experience).
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
