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ASIC Packaging Signal/Power Integrity Hardware Engineer

Cisco Systems
October 5, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
Other Semiconductor Jobs, Level - Mid-Career

Job Title

ASIC Packaging Signal/Power Integrity Hardware Engineer

Role Summary

Join Cisco Silicon One's ASIC packaging team in San Jose to develop and verify ASIC package designs with focus on signal integrity (SI) and power integrity (PI) for high-speed networking platforms. The role combines simulation, post-layout validation, and collaboration with layout, system partners, and vendors to deliver high-volume, production-ready packages.

Experience Level

Mid-level. Typical experience guidance: Bachelor's +4 years, Master's +2 years, PhD may be acceptable with no prior experience; equivalent practical experience considered.

Responsibilities

Key responsibilities include simulation-driven design, validation, and cross-team coordination to ensure SI/PI for ASIC packages.

  • Develop, document, and implement design rules for ultra-high-speed signaling.
  • Analyze substrate signal integrity and power integrity; recommend layout and substrate solutions.
  • Perform post-layout extraction, SI/PI reporting, and physical design validation for package releases.
  • Design and prepare ASIC packages for high-volume release, including verification of signaling and power delivery networks.
  • Collaborate with layout engineers, system partners, and vendors to resolve technical issues and meet SI/PI targets.

Requirements

Must-have technical skills and experience.

  • Strong understanding of high-speed design principles, including transmission line theory and impedance network analysis.
  • Proficiency with pre- and post-layout SI/PI simulation tools such as Cadence Sigrity and Ansys HFSS.
  • Experience conducting layout reviews and physical design validation; familiarity with Cadence APD or equivalent tools.
  • Solid circuit analysis skills and the ability to translate simulation results into layout or package changes.
  • Effective communication skills for presenting technical findings to engineers and vendors.

Nice-to-have:

  • Experience delivering ASIC/package designs for high-volume production.
  • Prior collaboration experience with external vendors and supply-chain partners on packaging issues.

Education Requirements

Bachelor's degree in Electrical Engineering (or equivalent) with ~4 years relevant experience; Master's degree with ~2 years; PhD acceptable with no required prior experience. Equivalent practical work experience is explicitly acceptable.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-10-03