ASIC Packaging Signal/Power Integrity Engineer

Job Title

ASIC Packaging Signal/Power Integrity Engineer

Role Summary

Join Cisco Silicon One's ASIC packaging team to develop and verify packaging and interconnects for high-performance silicon used in networking products. The role focuses on signal integrity (SI) and power integrity (PI) analysis, packaging design, and cross-team collaboration to meet performance, power, and manufacturability targets.

Experience Level

Mid-level. The posting specifies experience ranges tied to degree level; see Education Requirements for details.

Responsibilities

Primary responsibilities center on SI/PI analysis, package design, and collaboration across layout, system, and vendor teams.

• Develop, document, and implement design rules for ultra-high-speed signaling to meet power, performance, and area objectives.
• Perform substrate and interconnect SI and PI analysis; collaborate with layout teams to optimize interposer, substrate, and PCB solutions.
• Design and develop ASIC packages for high-volume release, including post-layout extraction, validation, and reporting.
• Work with system partners, vendors, and design leads to resolve technical issues and ensure combined power and signal integrity goals are met.

Requirements

Must-have technical skills are listed first; additional experience is desirable.

• Must-have: Strong expertise in high-speed design principles (transmission line theory, impedance/network analysis) and practical experience with SerDes architectures (example: 56G PAM4).
• Must-have: Experience with pre- and post-layout SI/PI simulations using industry tools such as Cadence Sigrity and Ansys HFSS.
• Must-have: Experience with post-layout extraction, layout reviews, and physical-design validation using Cadence APD and Ansys EM flows.
• Must-have: Proficiency using SPICE for circuit-level analysis and debugging.
• Must-have: Strong written and verbal communication skills for cross-functional collaboration.
• Nice-to-have: Experience with high-bandwidth memory (HBM) and high-speed memory interface SI; familiarity with die-to-die interfaces and advanced packaging techniques.
• Nice-to-have: Knowledge of vector network analysis methods and basic IBIS modeling.

Education Requirements

Bachelor's degree in Electrical Engineering with 4+ years of relevant experience; or Master's degree with 2+ years; or PhD with no prior experience required; equivalent practical work experience accepted. Fields referenced include Electrical Engineering and related technical disciplines.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).