ASIC NPI Support Engineer

Job Title

ASIC NPI Support Engineer

Role Summary

Provide end-to-end technical support for ASIC New Product Introduction (NPI) projects, covering backend physical implementation, tapeout, wafer fabrication, packaging and silicon bring-up. Coordinate cross-functional teams including foundry, packaging, PDK/IP, and design groups to ensure first-pass silicon success and ramp to mass production.

Experience Level

Senior level — the role expects an experienced engineer (senior) with substantial hands-on ASIC delivery and NPI experience.

Responsibilities

Accountable for technical leadership and cross-stage coordination throughout ASIC NPI lifecycle.

• Lead technical support for backend physical reviews, DFM checks, tapeout preparation and foundry handoff.
• Conduct pre-tapeout reviews of floorplan, P&R, power grid, physical verification (DRC/LVS/ERC) and DFM issues.
• Troubleshoot tapeout, mask, wafer processing and packaging issues; work with foundry process engineers on yield problems.
• Support silicon bring-up and post-silicon validation; correlate failures to layout/process and drive root-cause analysis and re-spin solutions.
• Develop and maintain NPI checklists, DFM rules and tapeout SOPs to improve first-pass success.
• Collect customer NPI feedback and coordinate internal teams (backend, PDK, IP, process) to resolve escalated issues.
• Organize technical workshops and document case studies of silicon failures and yield issues.
• Track milestones and manage multiple concurrent NPI projects to meet tapeout and production schedules.

Requirements

Must-have technical skills and experience (education requirements summarized separately below).

• 8+ years of hands-on experience in ASIC physical design, tapeout and NPI silicon validation, including silicon bring-up and yield ramp.
• Proven experience across full backend flow: floorplan, placement, CTS, routing, timing closure, power integrity and physical signoff using tools such as ICC2/Innovus, PrimeTime, StarRC and Calibre.
• Deep knowledge of DFM, multi-patterning, antenna effects, EM/IR signoff and physical verification closure before tapeout.
• Familiarity with foundry PDK release flow, mask data preparation (MDP) and GDS release requirements; understanding of wafer and packaging processes.
• Experience in post-silicon failure analysis, layout-process correlation and chip re-spin root-cause investigation.
• Strong problem-solving and cross-domain troubleshooting skills spanning design, layout, process and test.
• Excellent project coordination, attention to detail and ability to manage high-pressure tapeout schedules.
• Fluent written and spoken English for global customer and cross-fab coordination.

Nice-to-have:

• Experience with advanced process nodes (7nm/5nm) or mature nodes (28nm/14nm) for NPI projects.
• Foundry customer engineering, tapeout service or design service NPI experience.
• Proficiency in Tcl/Python scripting for automation of pre-tapeout checks and data analysis.
• Familiarity with packaging layout, bump design and 3D IC integration.
• Experience leading multi-project NPI efforts to improve first-silicon yield.

Education Requirements

Bachelor's degree or above in Microelectronics, Electrical/Electronics Engineering, Integrated Circuit Design, Computer Engineering or related technical field. The posting also defines acceptable equivalence between degree and experience: Bachelor's +6+ years, Master's +5+ years, or PhD +4+ years in relevant hardware applications or design roles; statements allow related work experience as an alternative to formal degree requirements.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.