ASIC Implementation Engineer (STA)

Job Title

ASIC Implementation Engineer (STA)

Role Summary

The Full-Chip Static Timing Analysis (STA) Engineer owns timing closure for ASIC projects, ensuring designs meet performance and timing requirements across process, voltage, and temperature corners. The role sits on the implementation/timing team and works closely with RTL, Physical Design, and DFT teams to drive sign-off-ready timing deliverables.

Experience Level

Senior — 8+ years of relevant ASIC timing/implementation experience.

Responsibilities

Key responsibilities include delivering final timing sign-off, developing constraints, and automating fixes during implementation.

• Own final full-chip timing sign-off across all PVT corners and multi-mode multi-corner (MMMC) scenarios.
• Author, validate, and maintain SDC constraints for functional and test modes (scan, MBIST, ATPG).
• Incorporate foundry sign-off corners, margins, and derates into timing flows and methodologies.
• Apply advanced timing concepts: AOCV/POCV, crosstalk analysis, and IR-drop aware STA.
• Manage and analyze hundreds of timing scenarios to ensure reliability across operating environments.
• Generate, automate, and implement timing ECOs to resolve setup, hold, and transition violations.
• Write automation and data-mining scripts to support analysis and ECO flows.
• Collaborate across RTL, Physical Design, and DFT to resolve complex timing issues and define guard-banding.
• Document best practices and lessons learned to improve timing methodologies for future projects.

Requirements

Must-have technical skills and experience.

• Expert proficiency with industry-standard sign-off EDA timing tools.
• Strong scripting skills in Tcl (primary), Python, and Perl or Shell for automation.
• Deep experience with MMMC timing analysis and managing on-chip variation derates.
• Practical knowledge of signal integrity (crosstalk) and IR-aware timing analysis.
• Experience authoring and validating SDC constraints for multiple modes.
• Proven ability to automate and implement timing ECOs.
• Strong problem-solving ability and clear communication skills for cross-team collaboration.

Education Requirements

Bachelor's degree in Electrical Engineering or Computer Engineering.

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.