ASIC/FPGA Verification Engineer (UVM / SystemVerilog)

Job Title

ASIC/FPGA Verification Engineer (UVM / SystemVerilog)

Role Summary

Work on verification of ASIC and FPGA designs using SystemVerilog and the UVM methodology. The role focuses on developing self-checking testbenches, functional coverage models, and automation to validate RTL, IP integration, and hardware bring-up.

Collaborate with system and hardware teams to define verification requirements, debug issues, and support FPGA prototyping and hardware integration testing.

Experience Level

Mid-level (Level - Mid-Career). Preferred experience guidance in the source: 2+ years for associate level or 5+ years for experienced verification engineers.

Responsibilities

Primary verification tasks and team interactions:

• Write SystemVerilog/UVM testbenches and reusable, self-checking UVM components (drivers, monitors, sequencers, scoreboards).
• Develop and close functional and code coverage models.
• Create tests to verify DSP and third-party IP integration.
• Run and analyze simulations, linting, CDC checks, static timing checks, and gate-level regressions.
• Automate verification flows with scripting and revision control; maintain simulation and regression infrastructure.
• Support FPGA bring-up, hardware emulation/prototyping, and hardware integration tests.
• Collaborate with system and hardware teams to capture requirements and debug issues.

Requirements

Core technical skills and must-haves. Preferred items listed separately.

• Proven experience with ASIC/FPGA verification using SystemVerilog and UVM.
• Ability to build self-checking testbenches and use object-oriented SystemVerilog features.
• Experience with functional coverage and strategies for coverage closure.
• Comfortable in Linux and proficient with scripting (Python, Perl, Make) and revision control (git or svn).
• Familiarity with simulation flows and verification tools (simulators, lint, CDC checks, STA, gate-level regressions).

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field — or equivalent practical experience.

Preferred Skills

Nice-to-have skills that improve fit:

• 2+ years (Associate) or 5+ years (Experienced) verification experience.
• Experience with hardware emulators (e.g., Palladium) and FPGA prototyping.
• Knowledge of high-speed SerDes protocols (PCIe, Ethernet, JESD204C).
• Experience with SystemVerilog Assertions (SVA) and RTL-to-GDS flows.
• Familiarity with space/radiation mitigation techniques is a plus.

About the Company

Company: Indotronix International

Technology and engineering services firm offering staffing, system integration, and product development support for aerospace, defense, semiconductor, and commercial clients.