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ASIC & FPGA Design Engineer, Staff (E4)

Lockheed Martin
August 31, 2026
Full-time
On-site
Orlando, Florida, United States
RTL Design Jobs, Level - Senior

Job Title

ASIC & FPGA Design Engineer, Staff (E4)

Role Summary

Lead digital design for RF-sensor platforms in the Missiles and Fire Control organization, focusing on FPGA-based architectures for mission-critical radar/RF applications.

Work includes translating algorithm models into synthesizable RTL/HLS, timing closure and optimization on RFSoC/Versal platforms, and cross-functional system integration.

Experience Level

Senior-level. Years of experience not specified.

Responsibilities

The engineer will design, implement, verify, and integrate FPGA-based digital solutions to meet radar/RF performance, power, and timing requirements.

  • Lead the digital development of RF-sensor platforms and define digital architectures.
  • Convert MATLAB/Simulink models into synthesizable RTL and HLS (Vitis HLS) code.
  • Write, simulate, and verify RTL and HLS implementations using self-checking testbenches.
  • Integrate custom and third-party IP, managing clock-domain crossings and timing-closure challenges.
  • Perform place-and-route, timing analysis, and optimization for RFSoC/Versal platforms.
  • Conduct design reviews and maintain configuration control in version-control systems.
  • Collaborate with algorithm developers, hardware engineers, and software teams for system integration.
  • Support system-level validation, debugging, and board-level testing.
  • Mentor junior engineers and foster an inclusive team culture.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

  • Must-have: Experience with AMD RFSoC and Versal families.
  • Proficiency in VHDL, Verilog, or SystemVerilog and RTL design flows.
  • Experience with Vivado HLS and converting Simulink/MATLAB models into synthesizable code.
  • Experience with FPGA simulation tools such as Synopsys VCS and self-checking testbenches.
  • Strong skills in timing analysis, clock-domain crossing, place-and-route, and timing closure on RFSoC/Versal.
  • Experience integrating IP blocks and implementing RF-DSP algorithms in hardware.
  • Proficiency in software programming languages such as C, C++, or Python for test/integration tasks.
  • Good communication and leadership abilities; experience mentoring engineers.
  • Nice-to-have: Prior experience with board-level bring-up and system-level validation.

Education Requirements

B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related technical field.


About the Company

Company: Lockheed Martin

Headquarters: Bethesda, Maryland, United States

Lockheed Martin is a global aerospace and defense company that specializes in the development of innovative technologies for national security, aerospace, and space exploration. With a commitment to harnessing the potential of space, Lockheed Martin aims to cultivate innovation, reduce costs, and advance holistic solutions across military and civilian sectors, focusing on future-ready technologies.

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Date Posted: 2026-08-29