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ASIC & FPGA Design Engineer (Staff)

Lockheed Martin
June 03, 2026
Full-time
On-site
Orlando, Florida, United States
Physical Design Jobs, Level - Senior

Job Title

ASIC & FPGA Design Engineer (Staff)

Role Summary

Join Lockheed Martin's Missiles and Fire Control organization to design custom analog and mixed-signal integrated circuits for defense systems. The role owns physical layout from floorplan through tape-out and works closely with circuit designers to produce parasitic-aware, high-performance analog layouts across multiple foundries.

Work includes verification closure, EMIR analysis, developing layout methodology and automation, managing tape-out sign-off packages, and mentoring junior engineers.

Experience Level

Senior β€” requires substantial experience; the posting specifies 8+ years of relevant layout experience.

Responsibilities

Primary responsibilities for this role include:

  • Own full-custom layout flow from floorplan through tape-out and sign-off.
  • Collaborate with circuit designers to implement parasitic-aware physical designs that meet performance targets.
  • Create and optimize floorplans for area, matching, signal integrity, and power delivery of analog blocks.
  • Drive physical verification closure (DRC, LVS, ERC, ANT) across multiple foundry processes.
  • Perform EMIR analysis to address IR drop and electromigration; implement mitigations.
  • Develop and maintain layout methodology and automation scripts to improve productivity and quality.
  • Prepare and manage tape-out sign-off packages, documentation, and design rule decks.
  • Mentor junior layout engineers and promote knowledge sharing within the team.

Requirements

Must-have technical skills and experience:

  • 8+ years of experience in full-custom analog or mixed-signal IC layout design.
  • Experience across process nodes from 130nm down to 12nm, including BCD technologies.
  • Proficiency in Synopsys Custom Compiler and Cadence Virtuoso layout environments.
  • Experience achieving physical verification closure (DRC, LVS, ERC, ANT) across multiple foundries.
  • Practical experience with EMIR analysis and mitigation for IR drop and electromigration.
  • Scripting or automation skills (SKILL, Tcl, Python, or Perl) to support layout flow and tooling.
  • Layout experience with precision analog blocks (PLLs, ADC/DACs, LDOs, bandgap references, amplifiers).
  • Ability to obtain and maintain a U.S. security clearance.

Education Requirements

Associate degree or higher in Electrical Engineering, Electronics Technology, Microelectronics, or a related field is specified. A Bachelor's degree in Electrical Engineering or a related field is preferred.


About the Company

Company: Lockheed Martin

Headquarters: Bethesda, Maryland, United States

Lockheed Martin is a global aerospace and defense company that specializes in the development of innovative technologies for national security, aerospace, and space exploration. With a commitment to harnessing the potential of space, Lockheed Martin aims to cultivate innovation, reduce costs, and advance holistic solutions across military and civilian sectors, focusing on future-ready technologies.

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Date Posted: 2026-06-03