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ASIC/FPGA Design Engineer IV - TS/SCI Clearance

Global Edge Group
September 10, 2026
Full-time
On-site
King of Prussia, Pennsylvania, United States
$124,800 - $220,000 USD yearly
RTL Design Jobs, Level - Mid-Career

Job Title

ASIC/FPGA Design Engineer IV - TS/SCI Clearance

Role Summary

Senior individual contributor responsible for FPGA and ASIC architecture, RTL design, integration, verification, and hardware validation for mission-critical space and national security systems.

Work on classified aerospace and defense programs within cross-functional teams to deliver secure, high-reliability hardware solutions.

Experience Level

Mid-level (Engineer IV). The role expects experienced engineers with significant FPGA/ASIC development and integration experience.

Responsibilities

Core duties include design, verification, integration, and support of FPGA/ASIC hardware for classified space and defense systems.

  • Design RTL using VHDL, Verilog, and/or SystemVerilog for FPGA and ASIC implementations.
  • Develop and implement FPGA/ASIC architectures for mission-critical applications.
  • Perform synthesis, timing analysis, and hardware optimization.
  • Support hardware integration, simulation, testing, debugging, and validation.
  • Collaborate with systems, hardware, software, and verification teams; participate in design reviews and documentation.
  • Execute full FPGA/ASIC lifecycle activities: requirements, architecture, implementation, integration, and test.
  • Troubleshoot root-cause issues and support system-level integration efforts in classified environments.
  • Work within Agile and cross-functional engineering environments.

Requirements

Must-have technical skills, clearance, and eligibility are listed first; preferred skills follow.

  • Must-have: Hands-on FPGA and/or ASIC design and development experience.
  • Must-have: RTL programming with VHDL, Verilog, and/or SystemVerilog.
  • Must-have: Experience with hardware integration, simulation, and test methodologies; familiarity with FPGA/ASIC toolchains.
  • Must-have: Active Top Secret clearance and ability to obtain/maintain TS/SCI eligibility.
  • Must-have: U.S. citizenship.
  • Nice-to-have: FPGA synthesis, timing analysis, hardware optimization, and ASIC verification/validation experience.
  • Nice-to-have: Experience with embedded hardware systems, high-reliability architectures, and classified space/defense programs.
  • Nice-to-have: Strong debugging/troubleshooting skills, Agile experience, and effective technical communication/documentation.

Education Requirements

Not specified.


About the Company

Company: Global Edge Group

Staffing and consulting firm providing technical recruiting and workforce solutions for defense, aerospace, engineering, IT, and professional services. Works with cleared candidates for classified government and commercial programs.

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Date Posted: 2026-09-10