ASIC & FPGA Design Engineer (Hybrid)

Job Title

ASIC & FPGA Design Engineer (Hybrid)

Role Summary

Responsible for architecture, RTL implementation, verification, and integration of ASIC and FPGA components for aerospace and defense systems. Work emphasizes deterministic operation, reliability, and producing aerospace-quality documentation.

Supports cross-functional teams to deliver designs that meet performance, power, timing, and integration requirements on target devices.

Experience Level

Mid-level - minimum 3 years professional experience in FPGA design and verification (typical 3–7 years).

Responsibilities

Primary responsibilities include design, verification, and integration of FPGA/ASIC hardware.

• Define architecture and design specifications for ASIC and FPGA components.
• Write and maintain RTL in VHDL, Verilog, and SystemVerilog to meet performance, power, and reliability goals.
• Develop synthesis, place-and-route, and timing-closure strategies for target devices.
• Create test plans, simulation models, and verification environments using UVM, SystemC, and Python-based testbenches.
• Lead hardware-in-the-loop testing, board-level debugging, and subsystem integration.
• Perform timing analysis, power budgeting, and resource utilization studies to guide device selection and FPGA utilization.
• Maintain version-controlled repositories and configuration control using GitLab; produce release packages and verification reports per aerospace standards.
• Collaborate with systems, software, hardware, mechanical, test, manufacturing, and quality teams to meet milestones.

Requirements

Must-have skills and security eligibility; nice-to-have items listed where applicable.

• Must-have: U.S. Person as defined by ITAR and ability to obtain/maintain DoD Secret clearance.
• Must-have: Minimum 3 years professional FPGA design and verification experience.
• Must-have: Proficiency in VHDL, Verilog, and SystemVerilog.
• Must-have: Experience with Xilinx and AMD toolsets (Vivado, Vitis, Vitis HLS) and UltraScale design methodology.
• Must-have: Experience with FPGA simulation tools such as Synopsys VCS and familiarity with Synopsys EDA tools.
• Must-have: Experience with high-speed interfaces (AXI, Ethernet, TCP/IP, PCIe, serial protocols) and practical lab debugging using oscilloscopes, spectrum analyzers, and signal generators.
• Nice-to-have: Experience with SystemC, UVM, Python-based testbenches, HIL testing, and ASIC synthesis/place-and-route flows.

Education Requirements

Bachelor of Science degree in Electrical Engineering or a closely related STEM field from an accredited university. (No explicit equivalent-experience language provided.)

About the Company

Company: The Structures Company

A national aerospace and defense staffing agency specializing in contract, contract-to-hire, and direct placements across engineering, IT, production, maintenance, and support roles for OEMs and Tier 1 suppliers.