ASIC Engineer / (Pre/Post) Silicon Validation Engineer

Job Title

ASIC Engineer / (Pre/Post) Silicon Validation Engineer

Role Summary

Work across the full silicon lifecycle for Meta's custom infrastructure ASICs, from pre-silicon emulation to post-silicon bring-up, characterization, and fleet deployment. The role focuses on validating silicon, driving emulation bring-up, and leading hardware/firmware/software debug to ensure reliable, high-performance products at scale.

Experience Level

Mid-level - typically 6+ years of relevant experience in ASIC/SoC development, pre-/post-silicon validation, hardware verification, or FPGA-based emulation.

Responsibilities

Key responsibilities include planning and executing validation across pre- and post-silicon phases, building emulation and automation infrastructure, and driving cross-team debug and delivery.

• Define and execute silicon validation strategies, test plans, coverage models, and productization readiness criteria.
• Develop and maintain FPGA-based emulation infrastructure and bring-up platforms.
• Partition and map RTL to emulation platforms, optimizing timing, resources, and debug visibility.
• Build automation, diagnostics, performance analysis, and debug tooling for validation workflows.
• Debug complex hardware/firmware/software interactions; perform root-cause analysis and remediation.
• Partner with RTL design and verification teams to find and fix functional bugs prior to tape-out.
• Ensure continuity between emulation and silicon validation so test content transitions cleanly into lab and data center bring-up.
• Characterize silicon in lab and production environments and feed findings into next-generation designs.
• Evaluate and integrate new validation and emulation tools and methodologies to improve throughput and debug efficiency.
• Lead end-to-end validation efforts and provide technical guidance on methodology and infrastructure best practices.

Requirements

Must-have skills and experience required for the role, followed by concise nice-to-have items.

• 6+ years of experience in ASIC/SoC development cycles with pre-silicon and/or post-silicon validation, hardware verification, or FPGA-based emulation for custom silicon.
• Experience troubleshooting and debugging silicon products, including use of waveform viewers, logic analyzers, and hardware debug probes to analyze hardware-software interactions.
• Experience with ASIC design or development, emulation, and post-silicon validation workflows.
• Experience developing automation scripts and test infrastructure in Python and C/C++.
• Proven ability to collaborate with RTL, verification, firmware, software, and systems teams in a custom silicon environment.

Nice-to-have:

• Experience with RTL partitioning, FPGA synthesis, and timing closure on emulation platforms (Palladium, Veloce, Zebu).
• Familiarity with SystemVerilog, UVM, formal verification, and simulation tools (VCS, Xcelium, Questa).
• Experience with data center/infrastructure silicon domains (networking ASICs, AI accelerators, storage controllers) and modules such as PCIe, Ethernet, Flash, DRAM, HBM.
• Understanding of embedded systems and common bus protocols (I2C, SPI, USB, PCIe) and experience with Linux/server management and driver-level validation (RDMA, DPDK).

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field is listed as typical; equivalent practical experience is explicitly accepted.

About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.