ASIC Engineer, Design Verification
Meta PlatformsJob Title
ASIC Engineer, Design Verification
Role Summary
Work on design verification for ASIC IP and SoC used in Meta's data center infrastructure. The role focuses on defining verification plans, building UVM-based testbenches, and driving verification closure using simulation, formal, and emulation.
The engineer will collaborate with design, emulation, software, and post-silicon teams to achieve high-quality first-pass silicon results.
Experience Level
Senior — typical background: 5+ years of relevant verification experience; 8+ years preferred for experienced hires.
Responsibilities
Primary responsibilities include planning, implementing, and closing verification for IP/sub-system/SoC blocks.
- Define and implement IP/SoC verification plans and test strategies.
- Design and develop UVM-based verification testbenches and functional tests.
- Drive verification to closure using defined metrics, including functional and code coverage.
- Debug and root-cause functional failures and work with design teams to resolve issues.
- Collaborate with cross-functional teams (Design, Model, Emulation, Silicon validation) to meet coverage and quality goals.
- Use and improve verification methodologies, tools and flows to increase verification efficiency and quality.
Requirements
Must-have technical skills and experience for successful candidates.
Must-have:
- Track record of first-pass silicon success in ASIC development cycles.
- 5+ years of experience with SystemVerilog/UVM and/or C/C++ based verification.
- 5+ years experience in IP, sub-system, and/or SoC level verification using SystemVerilog UVM/OVM.
- Experience with SystemVerilog Assertions, Formal methods, or Emulation as applied to functional verification.
- Experience with EDA tools and scripting (Python, TCL, Perl, Shell) to build verification tools and flows.
- Experience architecting and implementing Design Verification infrastructure and executing full verification cycles.
Nice-to-have / Preferred:
- Experience building relationships and working across design, model and emulation teams.
- Familiarity with revision control systems such as Mercurial, Git or SVN.
- Experience with verification of ARM or RISC-V based subsystems or SoCs.
- Verification experience on data-center application domains (video, AI/ML, networking) and high-speed interfaces (AMBA, PCIe, DDR, Ethernet).
Education Requirements
Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field — or equivalent practical experience.
About the Company
Company: Meta Platforms
Headquarters: Menlo Park, California, United States
American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.
