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ASIC Engineer, Design Verification

Meta Platforms
July 07, 2026
Full-time
On-site
Sunnyvale, California, United States
$146,000 - $209,000 USD yearly
Verification Jobs, Level - Mid-Career

Job Title

ASIC Engineer, Design Verification

Role Summary

Responsible for verification of IP and SoC designs for Meta data-center applications. Work on an agile hardware team collaborating with ASIC design, emulation, post-silicon validation and software teams to achieve verification closure and support first-pass silicon success.

Experience Level

Mid-level β€” typically requires several years of industry verification experience (see Requirements for specifics).

Responsibilities

Deliver verification plans, tests, and closure for IP, sub-system, and SoC designs.

  • Define and implement IP/SoC verification plans and metrics.
  • Build UVM-based verification testbenches and develop functional tests per the verification plan.
  • Drive verification to closure using simulation, formal methods, and emulation.
  • Debug and root-cause functional failures and work with design teams to resolve issues.
  • Collaborate with model, emulation, and silicon validation teams to meet coverage goals.
  • Improve verification flows and infrastructure using current methodologies and tools.

Requirements

Must-have technical skills and experience.

  • 6+ years hands-on experience with SystemVerilog and UVM methodology and/or C/C++ based verification.
  • 6+ years experience in IP/sub-system and/or SoC level verification using SystemVerilog UVM/OVM.
  • Experience with EDA tools and scripting languages (Python, TCL, Perl, Shell) to build verification tools and flows.

Nice-to-have:

  • Experience partnering with cross-functional design, model and emulation teams.
  • Experience with revision control systems (Mercurial, Git, SVN) and architecting verification infrastructure.
  • Experience with verification of data-center applications (Video, AI/ML, Networking), GPU/CPU designs, or ARM/RISC-V based sub-systems.
  • Experience developing UVM environments from scratch and verifying high-speed interfaces (PCIe, RoCE, DDR, HBM, Ethernet).
  • Experience with micro-architectural performance verification, SV Assertions, Formal, and Emulation.

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field β€” or equivalent practical experience.


About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.

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Date Posted: 2026-07-07